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ORCIDCircuits, Systems, and Signal Processing, Volume 45
Volume 45, Number 1, January 2026
Special Issue: Low Power Computing: Devices Circuits And Systems For Signal Processing
- Basant Kumar Mohanty, Alak Majumdar, Durgesh Nandan, Gyungsu Byun:
Guest Editorial: Low Power Computing: Devices, Circuits & Systems for Signal Processing. 1-8 - Shikha Khurana, Vandana Khanna, Shaveta Arora
, Neeraj Kumar Shukla, Mainak Basu:
Enhancing Image Security Using Pseudo-Memristive-Based Steganography. 9-29 - Barnali Chowdhury, Shashank Awasthi, Sanjeev Kumar Metya:
Optimized Reversible Full Adder Using Lithium Niobate MZI Based Peres Gate. 30-45 - K. N. Vijeyakumar, D. Silambarasan, Talluri Vineel Jessy, N. Saravanakumar, M. Manjubala:
ASIC Design of Analog Weighted Mean Filter Frontend for Image Processing Application. 46-73 - Mohammad Faseehuddin, P. Sivagami, Sadia Shireen, Worapong Tangsrirat:
Truly Mixed-Mode Universal Filter Capable of Operation in MISO and SIMO Configurations with Quadrature Oscillator as an Application. 74-115 - Mohamed Mamdouh, Sameh O. Abdellatif:
Assessing Cascaded Op-Amp and Pre-Current Amplifier Configurations in Transimpedance Amplifier Interfacing Circuits for Nano-Scale Current-Based Sensor Applications. 116-130 - Isaac Bruce, Michael Sekyere, Ruohan Yang, Saeid Karimpour, Colin C. McAndrew, Degang Chen:
Gradient Minimization in Layout Patterns for Analog Circuits. 131-152 - Shubhankar Majumdar:
Single Transistor Leakage Control for Low Power CMOS Circuits in Bio-implantable RF Receivers. 153-172 - Zhi-Li Zhang, Siyuan Yao, Puyang Liu, Cheng Li, You Lu, Hailong Wei:
An Improved Structure for Reducing Bias Current and Offset Voltage of Operational Amplifier. 173-202 - Jitendra Kanungo, Jitendra Raghuwanshi, Deepak Sharma, Sudeb Dasgupta:
Energy Efficient Single Phase Adiabatic Logic and Its Application in Ripple Carry Adder Design. 203-219 - Vassilis Alimisis, Vasileios Moustakas, Konstantinos Cheliotis, Christos Dimas, Paul P. Sotiriadis:
A Power and Area Efficient Analog Classifier for Electrical Impedance Tomography Applications. 220-253 - Xiaokun Lin, Bin Wang, Lu Liu, Xingchen Zhou, Weitao Yang, Hong Wang:
An 0.1 mm2/Ch 40 nm-CMOS 32-Channel Analog Front-End Acquisition Circuit with Analog-Domain Real-Time Offset Reduction and SS-ADC for LFP Neural Signal Recording. 254-277 - Amit Gupta, Ashish Raman:
Design and Large Signal Analysis of a 90 nm Novel CMOS Operational Trans-Resistance Amplifier. 278-298 - Chandan Kumar Choubey, Manoj Kumar Tiwari, Aruna Pathak, Durgesh Nandan:
Voltage Conveyor Transconductance Amplifier (VCTA): A Novel Analog Building Block for Advanced Analog Signal Processing Applications. 299-321 - Tika Ram Pokhrel, Alaaddin Al-Shidaifat, Hanjung Song, Alak Majumder:
Work Function Tuning in Strain Induced Double Gated Junctionless Transistor: A Device to Circuit Performance Study for Sub-20nm Nodes. 322-342 - Abhishek Chauhan, Ashish Raman:
Novel Charge Plasma Vertically Stacked Dopingless Nanosheet Field-Effect Transistor (DL-NSFET): Proposal and Extensive Analysis. 343-363 - Barnali Chowdhury, Shashank Awasthi, Sanjeev Kumar Metya:
Optimized Fredkin Gate and its Application to Design an Ancilla-Delay-Cost Efficient (2i * j) Reversible RAM. 364-392 - Vijay Pratap Yadav, Vipin Kumar Singh, Ashish Ranjan Kumar, Tika Ram Pokhrel, Sanjeev Kumar Metya, Alak Majumder:
Dynamic Header Switch to Influence Switching Current Profile of an IC Chip. 393-417 - Lianyou Lai, Yazhe Zhang, Ling Qin, Weijian Xu:
FiSA: Efficient Fixed-Point Stream Architecture for FastICA Implementing on FPGA. 418-439 - Rongkun Wang, Dong Wang, Wenjie Huang, Liming Song:
Available Residual Capacity Prediction Model for the Life Cycle of Storage Battery Considering Multiple Disturbances. 440-463 - Zhihao Chen, Tian Ban:
Miniaturization of Insertable Cardiac Monitor: ECG Signal Processing Based on Stochastic Computing. 464-495 - Keshan Deng, Jianqiong Zhang, Jiefeng Zang:
Single-Channel Communication Signal Source Estimation Algorithm Based on Diagonal Loading. 496-511 - Surbhi Bhatia Khan, A. Balajee, S. Sheik Mohideen Shah, T. R. Mahesh, Mohammed Alojail, Indrajeet Gupta:
A Novel Ensemble Empirical Decomposition and Time-Frequency Analysis Approach for Vibroarthrographic Signal Processing. 512-534 - Anirban Tarafdar, Alak Majumder, Biman Debbarma, Bidyut K. Bhattacharyya:
An Approach of ISI Elimination and High-Speed Data Reconstruction in Lossy On-Chip Serial Link. 535-556 - Wilfred Kisku, Amandeep Kaur, Deepak Mishra:
Efficient Edge-AI with Binarized Neural Networks and CMOS Image Sensors: A Sparsity-Driven Approach. 557-573 - Munshi Mostafijur Rahaman, Prasun Ghosal, Chandan Giri:
A Performance-Centric Topology for Hybrid Wireless-Network-on-Chip. 574-595 - P. Gowtham, A. Anita Angeline, P. Sasipriya:
Design and Analysis of a High-Speed Approximate Restoring Array Based Log Divider (ARLD). 596-620 - S. Harichandra Prasad, K. Kumar:
Performance Analysis of Low Power Inexact Recursive Multipliers for Image Processing Applications. 621-646 - Kattekola Naresh, Y. Padma Sai, Ch. Ganesh, Shubhankar Majumdar:
Design of Logic Level Pruning Approximate Arithmetic Circuits Using TIGFET. 647-663 - Sudhanshu Janwadkar, Rasika Dhavse:
Approximate Vedic Multiplier Based Digital Filter Architecture for Portable Biomedical Signal Acquisition. 664-702
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