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ORCIDIEEE Micro, Volume 14
Volume 14, Number 1, February 1994
- Richard H. Stern:
Disassembling object code: a misdeed. 2-4 - Karl-Erwin Grosspietsch:
Fault tolerance. 6-7 - Johan Karlsson, Peter Lidén, Peter Dahlgren, Rolf Johansson, Ulf Gunneflo:
Using heavy-ion radiation to validate fault-handling mechanisms. 8-23 - Janusz Sosnowski
:
Transient fault tolerance in digital systems. 24-35 - David Powell:
Distributed fault tolerance: lessons from Delta-4. 36-47 - Lisa Spainhower, Thomas A. Gregg, Ram Chillarege:
IBM's ES/9000 Model 982's fault-tolerant design for consolidation. 48-59 - Karl-Erwin Grosspietsch:
Fault tolerance in highly parallel hardware systems. 60-68 - John F. Stockton:
Portable electronic storage systems. 69-76
Volume 14, Number 2, April 1994
- Richard H. Stern:
Micro law-sweat equity investments. 3-4 - Steven R. Undy, Mick Bass, Dave Hollenbeck, Wayne Kever, Larry Thayer:
A low-cost graphics and multimedia workstation chip set. 10-22 - Peter Yan-Tek Hsu:
Designing the TFP microprocessor. 23-33 - Keith Diefendorff, Rich Oehler, Ron Hochsprung:
Evolution of the PowerPC architecture. 34-49 - Norman P. Jouppi, Patrick D. Boyle, John S. Fitch:
Designing, packaging, and testing a 300-MHz, 115 W ECL microprocessor. 50-58 - Nathaniel J. Davis IV, F. Gail Gray, Joseph A. Wegner, Shannon E. Lawson, Vinay Murthy, Tennis S. White:
Reconfiguring fault-tolerant two-dimensional array architectures. 60-69 - Alan E. Clapp, Thomas L. Harman:
Combining microcontroller units and PLDs for best system design. 70-78
Volume 14, Number 3, June 1994
- Richard H. Stern:
Micro Law. 4-6 - John Lazzaro, John Wawrzynek, Alan Kramer:
Systems technologies for silicon auditory models. 7-15 - Michel Verleysen, Philippe Thissen, Jean-Luc Voz, Jordi Madrenas:
An analog processor architecture for a neural network classifier. 16-28 - Alan F. Murray, Stephen Churcher, Alister Hamilton, Andrew J. Homes, Geoffrey Bruce Jackson, H. Martin Reekie, Robin Woodburn:
Pulse stream VLSI neural networks. 29-39 - Peter Masa, Klaas Hoen, Hans Wallinga:
A high-speed analog neural processor. 40-50 - Juan Manuel Moreno, Francisco Castillo, Joan Cabestany, Jordi Madrenas, Andrzej Napieralski:
An analog systolic neural processing architecture. 51-59 - Isaac Yi-Yuan Lee, Sheng-De Wang:
A versatile ring-connected hypercube. 60-67 - Daniel Foty, Edward J. Nowak:
MOSFET technology for low-voltage/low-power applications. 68-77
Volume 14, Number 4, August 1994
- Stephen L. Diamond:
A new PC parallel interface standard [IEEE Std 1284-1994]. 3 - Richard H. Stern:
Setting standards on the information superhighway. 4-5 - Giovanni De Micheli:
Computer-aided hardware-software codesign. 10-16 - Xiaobo Hu, Joseph G. D'Ambrosio, Brian T. Murray, Dah-Lain Tang:
Codesign of architectures for automotive powertrain modules. 17-25 - Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli, Luciano Lavagno:
Hardware-software codesign of embedded systems. 26-36 - Pai H. Chou, Elizabeth A. Walkup, Gaetano Borriello:
Scheduling for reactive real-time systems. 37-47 - Kunle Olukotun, Rachid Helaihel, Jeremy R. Levitt, Ricardo Ramírez:
A software-hardware cosynthesis approach to digital system simulation. 48-58 - Keith Boland, Apostolos Dollas:
Predicting and precluding problems with memory latency. 59-67 - Chu-Sing Yang, Shun-Yue Wu:
Modular fault-tolerant Boolean n-cubes. 68-77 - Dick Price:
Micro view. Clipper: soon a de facto standard? 80
Volume 14, Number 5, October 1994
- Richard Mateosian:
Micro Review. 2-4 - Richard H. Stern:
Micro Law. 5-6 - Richard Mateosian:
Guest Editor's Introduction: The PowerPC in Perspective. 7 - S. Peter Song, Marvin Denman, Joe Chang:
The PowerPC 604 RISC microprocessor. 8-17 - Terence M. Potter, Michael T. Vaden, Jerry Yound, Nasr Ullah:
Resolution of data and control-flow dependencies in the PowerPC 601. 18-29 - Keith Diefendorff, Ed Silha:
The PowerPC user instruction set architecture. 30-41 - Michael S. Allen, Michael Alexander, Chuck Wright, Joe Chang:
Designing the PowerPC 60X bus. 42-51 - Milo Tomasevic, Veljko Milutinovic:
Hardware approaches to cache coherence in shared-memory multiprocessors, Part 1. 52-59 - Beatrice Weiler, Edgar Nett:
SpeedLog: a generic log service supporting efficient node-crash recovery. 60-71 - Bert Haskell:
Portable electronics packaging technologies. 72-78
Volume 14, Number 6, December 1994
- Mohammed R. Taghizadeh, J. Michael Miller, Paul Blair, Frank A. P. Tooley:
Developing diffractive optics for optical computing. 10-19 - Plilippe J. Marchand, Pierre Ambs:
Developing a parallel-readout optical-disk system. 20-27 - Eberhard Lange, Yoshikazu Nitta, Kazuo Kyuma:
Optical neural chips. 29-41 - Edward R. Washwell, Gregory O. Cheen, Chao H. Huang:
Optical correlators for space applications: prospects and problems. 42-47 - Frank Reichel, Wolfgang Löffler, Ernst Gärtner:
Using optical space-frequency analysis for real-time pattern recognition. 49-60 - Milo Tomasevic, Veljko Milutinovic:
Hardware approaches to cache coherence in shared-memory multiprocessors. 2. 61-66
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