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George Athanasiou
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Publications
- 2016
- [j24]Harris E. Michail, George Athanasiou, Vasilios I. Kelefouras, George Theodoridis, Thanos Stouraitis, Costas E. Goutis:
Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs. J. Circuits Syst. Comput. 25(4): 1650032:1-1650032:26 (2016) - [j23]Harris E. Michail, Georgios Athanasiou, George Theodoridis, Andreas Gregoriades, Costas E. Goutis:
Design and implementation of totally-self checking SHA-1 and SHA-256 hash functions' architectures. Microprocess. Microsystems 45: 227-240 (2016) - 2015
- [c26]Harris E. Michail, Apostolis Kotsiolis, Athanasios Kakarountas, George Athanasiou, Costas E. Goutis:
Hardware implementation of the Totally Self-Checking SHA-256 hash core. EUROCON 2015: 1-5 - 2014
- [j19]Georgios Athanasiou, Harris E. Michail, George Theodoridis, Costas E. Goutis:
Optimising the SHA-512 cryptographic hash function on FPGAs. IET Comput. Digit. Tech. 8(2): 70-82 (2014) - [j18]Harris E. Michail, Georgios Athanasiou, George Theodoridis, Costas E. Goutis:
On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs. Integr. 47(4): 387-407 (2014) - 2013
- [j15]George Athanasiou, Harris E. Michail, George Theodoridis, Costas E. Goutis:
High-performance FPGA implementations of the cryptographic hash function JH. IET Comput. Digit. Tech. 7(1): 29-40 (2013) - [j13]George Athanasiou, George Theodoridis, Costas E. Goutis, Harris E. Michail, Takis Kasparis:
A Systematic Flow for Developing Totally Self-Checking Architectures for SHA-1 and SHA-2 Cryptographic Hash Families. J. Circuits Syst. Comput. 22(6) (2013) - [j12]Angeliki Kritikakou, Francky Catthoor, George Athanasiou, Vasilios I. Kelefouras, Costas E. Goutis:
Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput Constraints. ACM Trans. Archit. Code Optim. 10(2): 6:1-6:25 (2013) - 2012
- [j9]Nikolaos Alachiotis, Vasilios I. Kelefouras, George Athanasiou, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis:
A data locality methodology for matrix-matrix multiplication algorithm. J. Supercomput. 59(2): 830-851 (2012) - [j8]Harris E. Michail, George Athanasiou, Vasilios I. Kelefouras, George Theodoridis, Costas E. Goutis:
On the exploitation of a high-throughput SHA-256 FPGA design for HMAC. ACM Trans. Reconfigurable Technol. Syst. 5(1): 2:1-2:28 (2012) - [c14]Angeliki Kritikakou, Francky Catthoor, George Athanasiou, Vasilios I. Kelefouras, Costas E. Goutis:
A template-based methodology for efficient microprocessor and FPGA accelerator co-design. ICSAMOS 2012: 15-22 - [c13]George Athanasiou, Chara I. Chalkou, D. Bardis, Harris E. Michail, George Theodoridis, Costas E. Goutis:
High-throughput Hardware Architectures of the JH Round-three SHA-3 Candidate - An FPGA Design and Implementation Approach. SECRYPT 2012: 126-135 - [c12]Harris E. Michail, George Athanasiou, Andreas Gregoriades, George Theodoridis, Costas E. Goutis:
On the Development of Totally Self-checking Hardware Design for the SHA-1 Hash Function. SECRYPT 2012: 270-275 - 2011
- [j5]Vasilios I. Kelefouras, George Athanasiou, Nikolaos Alachiotis, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis:
A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization. IEEE Trans. Signal Process. 59(12): 6217-6226 (2011) - 2010
- [c6]Harris E. Michail, George Athanasiou, George Makridakis, Costas E. Goutis:
Designs and comparisons of authentication modules for IPSec in configurable and extensible embedded processor. ICECS 2010: 243-246 - [c5]Harris E. Michail, George Athanasiou, Angeliki Kritikakou, Costas E. Goutis, Andreas Gregoriades, Vicky G. Papadopoulou:
Ultra High Speed SHA-256 Hashing Cryptographic Module for IPSec Hardware/Software Codesign. SECRYPT 2010: 309-313
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