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ORCIDLudo Weyten
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2010 – 2019
- 2013
[j24]Pieter Rombouts
, Maarten De Bock, Jeroen De Maeyer, Ludo Weyten:
A Describing Function Study of Saturated Quantization and Its Application to the Stability Analysis of Multi-Bit Sigma Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(7): 1740-1752 (2013)- [j23]Maarten De Bock, Xinpeng Xing, Ludo Weyten, Georges G. E. Gielen, Pieter Rombouts:
Calibration of DAC Mismatch Errors in ΣΔ ADCs Based on a Sine-Wave Measurement. IEEE Trans. Circuits Syst. II Express Briefs 60-II(9): 567-571 (2013) - 2011
- [j22]Ludo Weyten, Pieter Rombouts, Benoit Catteau, Maarten De Bock:
Validation of Symbolic Expressions in Circuit Analysis E-Learning. IEEE Trans. Educ. 54(4): 564-568 (2011) - 2010
- [j21]Pieter Rombouts, Jeroen De Maeyer, Ludo Weyten:
Comments on "Performance Analysis of a Hybrid Incremental and Cyclic A/D Conversion Principle". IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(6): 1395 (2010) - [c16]Benoit Catteau, Bart De Vuyst, Pieter Rombouts, Ludo Weyten:
A 14-bit 250MS/s digital to analog converter with binary weighted Redundant Signed Digit coding. ISCAS 2010: 3345-3348
2000 – 2009
- 2009
- [j20]Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
Nyquist-criterion based design of a CT SigmaDelta-ADC with a reduced number of comparators. Integr. 42(1): 61-67 (2009) - [j19]Ludo Weyten, Pieter Rombouts, Jeroen De Maeyer:
Web-Based Trainer for Electrical Circuit Analysis. IEEE Trans. Educ. 52(1): 185-189 (2009) - 2008
- [j18]Johan Raman, Pieter Rombouts, Ludo Weyten:
An Unconstrained Architecture for Systematic Design of Higher Order SigmaDelta Force-Feedback Loops. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(6): 1601-1614 (2008) - [j17]Benoit Catteau, Pieter Rombouts, Johan Raman, Ludo Weyten:
An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(7): 1873-1883 (2008) - [c15]Benoit Catteau, Pieter Rombouts, Ludo Weyten:
Redundant signed digit coding in binary weighted DACs. ICECS 2008: 862-865 - 2007
- [j16]Stijn Reekmans, Pieter Rombouts, Ludo Weyten:
A delay-based complex double-sampled resonator for use in ƒs/4 quadrature bandpass ΣΔ modulators. IEICE Electron. Express 4(6): 192-198 (2007) - [j15]Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
Efficient Multibit Quantization in Continuous-Time Sigma Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(4): 757-767 (2007) - [j14]Stijn Reekmans, Pieter Rombouts, Ludo Weyten:
Mismatch Insensitive Double-Sampling Quadrature Bandpass SigmaDelta Modulation. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(12): 2599-2607 (2007) - [c14]Benoit Catteau, Pieter Rombouts, Ludo Weyten:
A Digital Calibration Technique for the Correction of Glitches in High-Speed DAC's. ISCAS 2007: 1477-1480 - [c13]Johan Raman, Pieter Rombouts, Ludo Weyten:
An Unconstrained Architecture for High-Order Sigma Delta Force-Feedback Inertial Sensors. ISCAS 2007: 3063-3066 - [c12]Stijn Reekmans, Pieter Rombouts, Ludo Weyten:
Quadrature Mismatch Shaping Techniques for Fully Differential Circuits. ISCAS 2007: 3614-3617 - 2006
- [j13]Stijn Reekmans, Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
Quadrature Mismatch Shaping for Digital-to-Analog Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(12): 2529-2538 (2006) - [c11]Stijn Reekmans, Benoit Catteau, Pieter Rombouts, Ludo Weyten:
Quadrature Mismatch Shaping with a Complex, Data Directed Swapper. ICECS 2006: 46-49 - [c10]Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
Nyquist-criterion based design of a CT ΣΔ-ADC with a reduced number of comparators. ICECS 2006: 411-414 - [c9]Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
Nyquist criterion based design of continuous time Sigma Delta modulators. ISCAS 2006 - [c8]Stijn Reekmans, Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
Quadrature mismatch shaping with a complex, tree structured DAC. ISCAS 2006 - 2005
- [j12]Pieter Rombouts, Ludo Weyten:
A versatile Nyquist-rate A/D converter with 16-18 bit performance for sensor readout applications. Integr. 39(1): 48-61 (2005) - [j11]Pieter Rombouts, Jeroen De Maeyer, Ludo Weyten:
Design of double-sampling ΣΔ modulation A/D converters with bilinear integrators. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(4): 715-722 (2005) - [c7]Jeroen De Maeyer, Johan Raman, Pieter Rombouts, Ludo Weyten:
STF behaviour in a CT ΔΣ modulator. ICECS 2005: 1-4 - 2004
- [j10]Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
A double-sampling extended-counting ADC. IEEE J. Solid State Circuits 39(3): 411-418 (2004) - [j9]Pieter Rombouts, Ludo Weyten:
Systematic design of double-sampling ΣΔ A/D converters with a modified noise transfer function. IEEE Trans. Circuits Syst. II Express Briefs 51-II(12): 675-679 (2004) - [c6]Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
Addressing static and dynamic errors in bandpass unit element multibit DAC's. ISCAS (1) 2004: 345-348 - [c5]Pieter Rombouts, Jeroen De Maeyer, Johan Raman, Ludo Weyten:
Systematic design of double-sampling Sigma Delta ADC's with modified NTF. ISCAS (1) 2004: 401-404 - 2003
- [j8]Pieter Rombouts, Jeroen De Maeyer, Ludo Weyten:
A 250-kHz 94-dB double-sampling ΣΔ modulation A/D converter with a modified noise transfer function. IEEE J. Solid State Circuits 38(10): 1657-1662 (2003) - [j7]Pieter Rombouts, Johan Raman, Ludo Weyten:
An approach to tackle quantization noise folding in double-sampling ΣΔ modulation A/D converters. IEEE Trans. Circuits Syst. II Express Briefs 50(4): 157-163 (2003) - 2002
- [c4]Pieter Rombouts, Johan Raman, Ludo Weyten:
An efficient technique to eliminate quantisation noise folding in double-sampling Sigma-Delta modulators. ISCAS (3) 2002: 707-710 - 2001
- [j6]Pieter Rombouts, Wim De Wilde, Ludo Weyten:
A 13.5-b 1.2-V micropower extended counting A/D converter. IEEE J. Solid State Circuits 36(2): 176-183 (2001) - [j5]Johan Raman, Ludo Weyten:
Composite functions in an orthogonal polynomial base. Signal Process. 81(7): 1557-1563 (2001) - 2000
- [j4]Johan Raman, Ludo Weyten:
Time domain adaptive delay estimation. IEEE Trans. Signal Process. 48(9): 2701-2705 (2000)
1990 – 1999
- 1999
- [c3]Johan Raman, Ludo Weyten:
Adaptive fractional delay estimation without lock-up. ICECS 1999: 737-740 - [c2]Johan Raman, Ludo Weyten:
On noise suppression in adaptive delay estimation. ISSPA 1999: 211-214 - 1998
- [c1]Pieter Rombouts, Ludo Weyten:
Dynamic element matching for pipelined A/D conversion. ICECS 1998: 315-318 - 1990
- [j3]Wim De Pauw, Ludo Weyten:
Multiple storage adaptive multi-trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(3): 248-252 (1990)
1980 – 1989
- 1989
- [j2]Ludo Weyten, Wim De Pauw:
Quad list quad trees: a geometrical data structure with improved performance for large region queries. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(3): 229-233 (1989) - [j1]Ludo Weyten, Wim De Pauw:
Performance prediction for adaptive quad tree graphical data structures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(11): 1218-1222 (1989)
Coauthor Index
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