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ORCIDTatsuya Saito
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2020 – today
- 2023
[j6]Ren Tsunata
, Masatsugu Takemoto, Jun Imai, Tatsuya Saito, Tomoyuki Ueno:
A Proposal of an Axial-Flux Permanent-Magnet Machine Employing SMC Core With Tooth-Tips Constructed by One-Pressing Process: Improving Torque and Manufacturability. IEEE Access 11: 109435-109447 (2023)- [c15]Danny Hynds, Dingding Zheng, Yilin Zhang, Hua Ma, Kirill Ragozin, George Chernyshov, Jamie A. Ward, Tatsuya Saito, Kai Kunze, Kouta Minamizawa:
Phantom Undulations: Remote Physiological Sensing in Abstract Installation Works. AHs 2023: 367-370 - [c14]Aoi Uyama, Danny Hynds, Dingding Zheng, George Chernyshov, Tatsuya Saito, Kai Kunze, Kouta Minamizawa:
Feel What You Don't Hear: A New Framework for Non-aural Music Experiences. NIME 2023 - [c13]Haruka Onoda, Sohei Wakisaka, Tatsuya Saito, Kouta Minamizawa:
Transcale: Embodiment Transition Toward Multi-Verse Exploration. SIGGRAPH Asia XR 2023: 28:1-28:2 - [c12]Aoi Uyama, Youichi Kamiyama, Sohei Wakisaka, Arata Horie, Tatsuya Saito, Kouta Minamizawa:
Somatic Music: Enhancing Musical Experiences through the Performer's Embodiment. SIGGRAPH ASIA Posters 2023: 35:1-35:2
2010 – 2019
- 2018
- [c11]Junichi Suzuki, Junichi Yamashita, Masami Hanyu, Masamichi Ido, Tatsuya Saito, Yasuhiro Nakashima, Masanori Hayashikoshi, Yukiyoshi Kiyota:
A Cost-Effective High Accuracy Auto-Trimming System without Tester Constraint for Low-End Embedded Flash Memory. ISOCC 2018: 48-49 - 2013
- [c10]Shin-ya Matsushita, Tatsuya Saito, Li Xu:
A procedure for n-D Fornasini-Marchesini state-space model realization based on right matrix fraction description. ICASSP 2013: 6133-6137 - [c9]Tatsuya Saito, Yoshifumi Okada:
Bicluster-Network Method and Its Application to Movie Recommendation. KSE (2) 2013: 147-153 - [c8]Hiroaki Shikano, Machiko Asaie, Junji Yamamoto, Tatsuya Saito, Shunsuke Ota, Keitaro Uehara:
Study on supporting technology for operational procedure design of IT systems in cloud-era datacenters. SAC 2013: 405-407 - 2012
- [c7]Robert Payne, Tatsuya Saito:
Session 7 overview: Multi-Gb/s receiver and parallel I/O techniques: Wireline subcommittee. ISSCC 2012: 128-129 - 2011
- [j5]Goichi Ono, Keiki Watanabe, Takashi Muto, Hiroki Yamashita, Koji Fukuda, Noboru Masuda, Ryo Nemoto, Eiichi Suzuki, Takashi Takemoto, Fumio Yuki, Masayoshi Yagyu, Hidehiro Toyoda, Masashi Kono, Akihiro Kambe, Seiichi Umai, Tatsuya Saito, Shinji Nishimura:
A 10: 4 MUX and 4: 10 DEMUX Gearbox LSI for 100-Gigabit Ethernet Link. IEEE J. Solid State Circuits 46(12): 3101-3112 (2011) - [j4]Hua Cheng, Tatsuya Saito, Shin-ya Matsushita, Li Xu:
Realization of multidimensional systems in Fornasini-Marchesini state-space model. Multidimens. Syst. Signal Process. 22(4): 319-333 (2011) - [c6]Goichi Ono, Keiki Watanabe, Takashi Muto, Hiroki Yamashita, Koji Fukuda, Noboru Masuda, Ryo Nemoto, Eiichi Suzuki, Takashi Takemoto, Fumio Yuki, Masayoshi Yagyu, Hidehiro Toyoda, Akihiro Kambe, Tatsuya Saito, Shinji Nishimura:
10: 4 MUX and 4: 10 DEMUX gearbox LSI for 100-gigabit Ethernet link. ISSCC 2011: 148-150 - 2010
- [j3]Koji Fukuda, Hiroki Yamashita, Goichi Ono, Ryo Nemoto, Eiichi Suzuki, Noboru Masuda, Takashi Takemoto, Fumio Yuki, Tatsuya Saito:
A 12.3-mW 12.5-Gb/s Complete Transceiver in 65-nm CMOS Process. IEEE J. Solid State Circuits 45(12): 2838-2849 (2010) - [c5]Takashi Takemoto, Fumio Yuki, Hiroki Yamashita, Shinji Tsuji, Tatsuya Saito, Shinji Nishimura:
A 25 Gb/s × 4-channel 74 mW/ch transimpedance amplifier in 65 nm CMOS. CICC 2010: 1-4 - [c4]Koji Fukuda, Hiroki Yamashita, Goichi Ono, Ryo Nemoto, Eiichi Suzuki, Takashi Takemoto, Fumio Yuki, Tatsuya Saito:
A 12.3mW 12.5Gb/s complete transceiver in 65nm CMOS. ISSCC 2010: 368-369
2000 – 2009
- 2009
- [j2]Koji Fukuda, Hiroki Yamashita, Fumio Yuki, Goichi Ono, Ryo Nemoto, Eiichi Suzuki, Takashi Takemoto, Masashi Kono, Tatsuya Saito:
A 10-Gb/s Receiver With Track-and-Hold-Type Linear Phase Detector and Charge-Redistribution First-Order ΔΣ Modulator in 90-nm CMOS. IEEE J. Solid State Circuits 44(12): 3539-3546 (2009) - [c3]Tatsuya Saito, Masahiko Sato:
Fly! Little Me: Localization of Body-Image within Reduced-Self. HCI (2) 2009: 255-260 - [c2]Koji Fukuda, Hiroki Yamashita, Fumio Yuki, Goichi Ono, Ryo Nemoto, Eiichi Suzuki, Takashi Takemoto, Tatsuya Saito:
10Gb/s receiver with track-and-hold-type linear phase detector and charge-redistribution 1st-order ΔΣ modulator. ISSCC 2009: 186-187 - 2008
- [c1]Koji Fukuda, Hiroki Yamashita, Fumio Yuki, Masayoshi Yagyu, Ryo Nemoto, Takashi Takemoto, Tatsuya Saito, Norio Chujo, Keiichi Yamamoto, Hisaaki Kanai, Atsuhiro Hayashi:
An 8Gb/s Transceiver with 3×-Oversampling 2-Threshold Eye-Tracking CDR Circuit for -36.8dB-loss Backplane. ISSCC 2008: 98-99 - 2004
- [j1]Yoshio Miki, Tatsuya Saito, Hiroki Yamashita, Fumio Yuki, Takashige Baba, Akio Koyama, Masahito Sonehara:
A 50-mW/ch 2.5-Gb/s/ch data recovery circuit for the SFI-5 interface with digital eye-tracking. IEEE J. Solid State Circuits 39(4): 613-621 (2004)
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