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2010 – 2019
- 2013
[j2]Yuanwu Lei, Yong Dou, Lei Guo, Jinbo Xu, Jie Zhou, Yazhuo Dong, Hongjian Li:
VLIW coprocessor for IEEE-754 quadruple-precision elementary functions. ACM Trans. Archit. Code Optim. 10(3): 12:1-12:22 (2013)- [j1]Yuanwu Lei, Yong Dou, Yazhuo Dong, Jie Zhou, Fei Xia:
FPGA implementation of an exact dot product and its application in variable-precision floating-point arithmetic. J. Supercomput. 64(2): 580-605 (2013) - [c7]Yazhuo Dong, Wu Zhan, Xiqing Ye:
Pipeline template and scheduling algorithm for mapping multiple loop nests on FPGA with limited resources. ACM Great Lakes Symposium on VLSI 2013: 343-344
2000 – 2009
- 2008
- [c6]Jie Zhou, Yong Dou, Yuanwu Lei, Yazhuo Dong:
Hybrid-Mode Floating-Point FPGA CORDIC Co-processor. ARC 2008: 254-259 - [c5]Jie Zhou, Yong Dou, Yuanwu Lei, Jinbo Xu, Yazhuo Dong:
Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor. HPCC 2008: 182-189 - [c4]Jie Zhou, Yazhuo Dong, Yong Dou, Yuanwu Lei:
Dynamic Configurable Floating-Point FFT Pipelines and Hybrid-Mode CORDIC on FPGA. ICESS 2008: 616-620 - 2007
- [c3]Yazhuo Dong, Yong Dou, Jie Zhou:
Optimized Generation of Memory Structure in Compiling Window Operations onto Reconfigurable Hardware. ARC 2007: 110-121 - [c2]Yazhuo Dong, Yong Dou:
A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications. ASP-DAC 2007: 523-528 - 2006
- [c1]Jinhui Xu, Guiming Wu, Yong Dou, Yazhuo Dong:
Designing a Coarse-Grained Reconfigurable Architecture Using Loop Self-Pipelining. Asia-Pacific Computer Systems Architecture Conference 2006: 567-573
Coauthor Index
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