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Tohru Sasaki
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2020 – today
- 2021
- [j7]Bilal Ahmed Mir
, Tohru Sasaki, Yusuke Nagahata, Eri Yamabe, Naoya Miwa, Kenji Terabayashi:
Surrounding Structure Estimation Using Ambient Light. Int. J. Autom. Technol. 15(6): 794-803 (2021) - 2020
- [j6]Tohru Sasaki, Yudai Fujiwara, Kaoru Tachikawa, Kenji Terabayashi, Kuniaki Dohda:
Hydraulic Micro Device with Force Sensing for Measurement of Mechanical Characteristics. Int. J. Autom. Technol. 14(4): 625-632 (2020) - [j5]Yusuke Ikemoto, Kenichiro Nishimura, Yuichiro Mizutama, Tohru Sasaki, Mitsuru Jindai:
Network Connectivity Control of Mobile Robots by Fast Position Estimations and Laplacian Kernel. J. Robotics Mechatronics 32(2): 422-436 (2020)
2010 – 2019
- 2019
- [c10]Mitsuru Jindai, Shunsuke Ota, Toshiyuki Yasuda, Tohru Sasaki:
Hug Behavior Request Model with Approaching Human for Hug Robots. ICSR 2019: 247-255 - 2018
- [j4]Naoya Hatakeyama, Tohru Sasaki, Kenji Terabayashi, Masahiro Funato, Mitsuru Jindai:
Position and Posture Measurement Method of the Omnidirectional Camera Using Identification Markers. J. Robotics Mechatronics 30(3): 354-362 (2018) - 2017
- [c9]Mitsuru Jindai, Shunsuke Ota, Toshiyuki Yasuda, Tohru Sasaki, Yoshihiro Sejima:
Development of a hug request motion model during active approach to human. SMC 2017: 612-617 - 2015
- [c8]Shunsuke Ota, Mitsuru Jindai, Tohru Sasaki, Yusuke Ikemoto:
Handshake response motion model with approaching of human based on an analysis of human handshake motions. ICUMT 2015: 8-13 - [c7]Mitsuru Jindai, Shunsuke Ota, Yusuke Ikemoto, Tohru Sasaki:
Handshake request motion model with an approaching human for a handshake robot system. RAM/CIS 2015: RAM:265-270
2000 – 2009
- 2008
- [j3]Tohru Sasaki, Kunio Koizumi, Motofumi Sasaki:
Motion Characteristics of Loop Type Elliptic Resonator. J. Robotics Mechatronics 20(1): 61-67 (2008)
1980 – 1989
- 1987
- [j2]Shigeru Takasaki, Tohru Sasaki, Nobuyoshi Nomizu, Nobuhiko Koike, Kenji Ohmori:
Block-Level Hardware Logic Simulation Machine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(1): 46-54 (1987) - 1986
- [c6]Shigeru Takasaki, Tohru Sasaki, Nobuyoshi Nomizu, Hiroshi Ishikura, Nobuhiko Koike:
HAL II: a mixed level hardware logic simulation system. DAC 1986: 581-587 - 1985
- [j1]Nobuhiko Koike, Kenji Ohmori, Tohru Sasaki:
HAL: A High-Speed Logic Simulation Machine. IEEE Des. Test 2(5): 61-73 (1985) - 1984
- [c5]Tohru Sasaki, Shunichi Kato, Nobuyoshi Nomizu, Hidetoshi Tanaka:
Logic Design Verification Using Automated Test Generation. ITC 1984: 88-95 - 1983
- [c4]Tohru Sasaki, Nobuhiko Koike, Kenji Ohmori, Kyoji Tomita:
HAL: A block level HArdware Logic simulator. DAC 1983: 150-156 - [c3]Masato Kawai, Hideo Shibano, Shigehiro Funatsu, Shunichi Kato, T. Kurobe, K. Ookawa, Tohru Sasaki:
A High Level Test Pattern Generation Algorithm. ITC 1983: 346-353 - 1981
- [c2]Tohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato:
Hierarchical design verification for large digital systems. DAC 1981: 105-112 - 1980
- [c1]Tohru Sasaki, Akihiko Yamada, Shunichi Kato, Terufumi Nakazawa, Kyoji Tomita, Nobuyoshi Nomizu:
MIXS: A mixed level simulator for large digital system logic verification. DAC 1980: 626-633
Coauthor Index
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