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Thorsten von Sydow
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2010 – 2019
- 2010
- [p1]Tobias G. Noll, Thorsten von Sydow, Bernd Neumann, Jochen Schleifer, Thomas Coenen, Götz Kappen:
Reconfigurable Components for Application-Specific Processor Architectures. Dynamically Reconfigurable Systems 2010: 25-49
2000 – 2009
- 2008
- [j3]Bernd Neumann, Thorsten von Sydow, Holger Blume
, Tobias G. Noll:
Application Domain Specific Embedded FPGAs for Flexible ISA-Extension of ASIPs. J. Signal Process. Syst. 53(1-2): 129-143 (2008) - [c6]Bernd Neumann, Thorsten von Sydow, Holger Blume
, Tobias G. Noll:
Design flow for embedded FPGAs based on a flexible architecture template. DATE 2008: 56-61 - [c5]Thorsten von Sydow, Holger Blume
, Götz Kappen, Tobias G. Noll:
ASIP-eFPGA Architecture for Multioperable GNSS Receivers. SAMOS 2008: 136-145 - 2007
- [j2]Holger Blume
, Thorsten von Sydow, Daniel Becker, Tobias G. Noll:
Application of deterministic and stochastic Petri-Nets for performance modeling of NoC architectures. J. Syst. Archit. 53(8): 466-476 (2007) - 2006
- [j1]Holger Blume
, Thorsten von Sydow, Tobias G. Noll:
A Case Study for the Application of Deterministic and Stochastic Petri Nets in the SoC Communication Domain. J. VLSI Signal Process. 43(2-3): 223-233 (2006) - [c4]Thorsten von Sydow, Bernd Neumann, Holger Blume
, Tobias G. Noll:
Quantitative Analysis of Embedded FPGA-Architectures for Arithmetic. ASAP 2006: 125-131 - [c3]Thorsten von Sydow, Matthias Korb, Bernd Neumann, Holger Blume
, Tobias G. Noll:
Modelling and Quantitative Analysis of Coupling Mechanisms of Programmable Processor Cores and Arithmetic Oriented eFPGA Macros. ReConFig 2006: 252-261 - 2005
- [c2]Holger Blume
, Thorsten von Sydow, Daniel Becker, Tobias G. Noll:
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets. SAMOS 2005: 374-383 - 2004
- [c1]Holger Blume
, Thorsten von Sydow, Tobias G. Noll:
Performance Analysis of SoC Communication by Application of Deterministic and Stochastic Petri Nets. SAMOS 2004: 484-493
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