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2020 – today
- 2024
[j36]Fanny Spagnolo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
Efficient implementation of signed multipliers on FPGAs. Comput. Electr. Eng. 116: 109217 (2024)- [j35]Cosimo Ieracitano
, Nadia Mammone, Fanny Spagnolo, Fabio Frustaci, Stefania Perri, Pasquale Corsonello, Francesco Carlo Morabito:
An explainable embedded neural system for on-board ship detection from optical satellite imagery. Eng. Appl. Artif. Intell. 133: 108517 (2024) - [j34]Fanny Spagnolo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
Approximate bilateral filters for real-time and low-energy imaging applications on FPGAs. J. Supercomput. 80(11): 15894-15916 (2024) - [j33]Fanny Spagnolo, Stefania Perri, Massimo Vatalaro, Fabio Frustaci, Felice Crupi, Pasquale Corsonello:
Exploring the Usage of Fast Carry Chains to Implement Multistage Ring Oscillators on FPGAs: Design and Characterization. IEEE Trans. Very Large Scale Integr. Syst. 32(8): 1472-1484 (2024) - [c23]Fanny Spagnolo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
KIT: Kernel Isotropic Transformation of Bilateral Filters for Image Denoising on FPGA. FPL 2024: 19-23 - 2023
- [j32]Fanny Spagnolo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
Design of Approximate Bilateral Filters for Image Denoising on FPGAs. IEEE Access 11: 1990-2000 (2023) - [j31]Stefania Perri, Fanny Spagnolo, Fabio Frustaci, Pasquale Corsonello:
Design of Leading Zero Counters on FPGAs. IEEE Embed. Syst. Lett. 15(3): 149-152 (2023) - [j30]Abhilasha Dave, Fabio Frustaci, Fanny Spagnolo, Mikail Yayla, Jian-Jia Chen, Hussam Amrouch:
HW/SW Codesign for Approximation-Aware Binary Neural Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 33-47 (2023) - [j29]Mikail Yayla, Fabio Frustaci, Fanny Spagnolo, Jian-Jia Chen, Hussam Amrouch:
Unlocking Efficiency in BNNs: Global by Local Thresholding for Analog-Based HW Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(4): 940-955 (2023) - [j28]Fabio Frustaci, Fanny Spagnolo, Stefania Perri, Pasquale Corsonello:
A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 756-760 (2023) - 2022
- [j27]Fabio Frustaci, Fanny Spagnolo, Stefania Perri, Giuseppe Cocorullo, Pasquale Corsonello:
Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes. Sensors 22(8): 2839 (2022) - [j26]Stefania Perri, Fanny Spagnolo, Fabio Frustaci, Pasquale Corsonello:
Multibit Full Comparator Logic in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs 69(11): 4508-4512 (2022) - [c22]Antonio Borelli, Fanny Spagnolo, Raffaele Gravina, Fabio Frustaci:
An FPGA-Based Hardware Accelerator for the k-Nearest Neighbor Algorithm Implementation in Wearable Embedded Systems. AII 2022: 44-56 - [c21]Roman Huzyuk, Fanny Spagnolo, Fabio Frustaci:
Designing Low-Power and High-Speed FPGA-Based Binary Decision Tree Hardware Accelerators. AII 2022: 57-72 - 2021
- [j25]Stefania Perri, Fanny Spagnolo, Fabio Frustaci, Pasquale Corsonello:
Accuracy Improved Low-Energy Multi-Bit Approximate Adders in QCA. IEEE Trans. Circuits Syst. II Express Briefs 68(11): 3456-3460 (2021) - 2020
- [j24]Stefania Perri, Fanny Spagnolo, Fabio Frustaci, Pasquale Corsonello:
Parallel architecture of power-of-two multipliers for FPGAs. IET Circuits Devices Syst. 14(3): 381-389 (2020) - [j23]Stefania Perri, Fabio Frustaci, Fanny Spagnolo, Pasquale Corsonello:
Stereo vision architecture for heterogeneous systems-on-chip. J. Real Time Image Process. 17(2): 393-415 (2020) - [j22]Fabio Frustaci, Stefania Perri, Pasquale Corsonello, Massimo Alioto:
Approximate Multipliers With Dynamic Truncation for Energy Reduction via Graceful Quality Degradation. IEEE Trans. Circuits Syst. 67-II(12): 3427-3431 (2020) - [c20]Fanny Spagnolo, Fabio Frustaci, Stefania Perri, Pasquale Corsonello:
A High-Performance and Power-Efficient SIMD Convolution Engine for FPGAs. ICECS 2020: 1-4 - [c19]Fanny Spagnolo, Stefania Perri, Fabio Frustaci, Pasquale Corsonello:
Reconfigurable Convolution Architecture for Heterogeneous Systems-on-Chip. MECO 2020: 1-5
2010 – 2019
- 2019
- [j21]Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Lorena-de-los-Angeles Guachi-Guachi, Stefania Perri:
Multimodal background subtraction for high-performance embedded systems. J. Real Time Image Process. 16(5): 1407-1423 (2019) - [j20]Fabio Frustaci, Stefania Perri, Pasquale Corsonello, Massimo Alioto:
Energy-Quality Scalable Adders Based on Nonzeroing Bit Truncation. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 964-968 (2019) - 2018
- [c18]Fanny Spagnolo, Stefania Perri, Fabio Frustaci, Pasquale Corsonello:
Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems. ICECS 2018: 749-752 - [c17]Fanny Spagnolo, Stefania Perri, Fabio Frustaci, Pasquale Corsonello:
Designing Fast Convolutional Engines for Deep Learning Applications. ICECS 2018: 753-756 - [c16]Stefania Perri, Fabio Frustaci, Fanny Spagnolo, Pasquale Corsonello:
Design of Real-Time FPGA-based Embedded System for Stereo Vision. ISCAS 2018: 1-5 - 2017
- [j19]Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
Design of Efficient BCD Adders in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs 64-II(5): 575-579 (2017) - 2016
- [j18]Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
Design of efficient QCA multiplexers. Int. J. Circuit Theory Appl. 44(3): 602-615 (2016) - [j17]Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
An efficient hardware-oriented stereo matching algorithm. Microprocess. Microsystems 46: 21-33 (2016) - [j16]Fabio Frustaci, David T. Blaauw, Dennis Sylvester, Massimo Alioto:
Approximate SRAMs With Dynamic Energy-Quality Management. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2128-2141 (2016) - 2015
- [j15]Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
Power supply noise in accurate delay model for the sub-threshold domain. Integr. 50: 127-136 (2015) - [j14]Fabio Frustaci, Mahmood Khayatzadeh, David T. Blaauw, Dennis Sylvester, Massimo Alioto:
SRAM for Error-Tolerant Applications With Dynamic Energy-Quality Management in 28 nm CMOS. IEEE J. Solid State Circuits 50(5): 1310-1323 (2015) - [j13]Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
Low-Leakage SRAM Wordline Drivers for the 28-nm UTBB FDSOI Technology. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3133-3137 (2015) - [c15]Pasquale Corsonello, Stefania Perri, Fabio Frustaci:
Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology. ICCD 2015: 499-504 - [c14]Fabio Frustaci, David T. Blaauw, Dennis Sylvester, Massimo Alioto:
Better-than-voltage scaling energy reduction in approximate SRAMs via bit dropping and bit reuse. PATMOS 2015: 132-139 - [c13]Mahmood Khayatzadeh, Fabio Frustaci, David T. Blaauw, Dennis Sylvester, Massimo Alioto:
A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS. VLSIC 2015: 270- - 2014
- [j12]Raffaele De Rose, Marco Lanuzza, Fabio Frustaci, Sohan Purohit:
Designing Dynamic Carry Skip Adders: Analysis and Comparison. Circuits Syst. Signal Process. 33(4): 1019-1034 (2014) - [j11]Fabio Frustaci, Marco Lanuzza, Stefania Perri, Pasquale Corsonello:
Analyzing noise robustness of wide fan-in dynamic logic gates under process variations. Int. J. Circuit Theory Appl. 42(5): 452-467 (2014) - [j10]Pasquale Corsonello, Fabio Frustaci, Marco Lanuzza, Stefania Perri:
Over/Undershooting Effects in Accurate Buffer Delay Model for Sub-Threshold Domain. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(5): 1456-1464 (2014) - [c12]Lorena Guachi, Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
A novel background subtraction method based on color invariants and grayscale levels. ICCST 2014: 1-5 - [c11]Fabio Frustaci, Mahmood Khayatzadeh, David T. Blaauw, Dennis Sylvester, Massimo Alioto:
13.8 A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS. ISSCC 2014: 244-245 - 2012
- [j9]Fabio Frustaci, Stefania Perri, Marco Lanuzza, Pasquale Corsonello:
Energy-efficient single-clock-cycle binary comparator. Int. J. Circuit Theory Appl. 40(3): 237-246 (2012) - [j8]Marco Lanuzza, Raffaele De Rose, Fabio Frustaci, Stefania Perri, Pasquale Corsonello:
Comparative analysis of yield optimized pulsed flip-flops. Microelectron. Reliab. 52(8): 1679-1689 (2012) - [j7]Fabio Frustaci, Pasquale Corsonello, Stefania Perri:
Analytical Delay Model Considering Variability Effects in Subthreshold Domain. IEEE Trans. Circuits Syst. II Express Briefs 59-II(3): 168-172 (2012) - 2011
- [j6]Fabio Frustaci, Massimo Alioto, Pasquale Corsonello:
Tapered-Vth Approach for Energy-Efficient CMOS Buffers. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(11): 2698-2707 (2011) - [c10]Fabio Frustaci, Pasquale Corsonello, Massimo Alioto:
Optimization and evaluation of tapered-VTH approach for energy-efficient CMOS buffers. ECCTD 2011: 592-595 - [c9]Fabio Frustaci, Pasquale Corsonello, Massimo Alioto:
Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology. ISCAS 2011: 2075-2078 - 2010
- [j5]Marco Lanuzza, Paolo Zicari, Fabio Frustaci, Stefania Perri, Pasquale Corsonello:
Exploiting Self-Reconfiguration Capability to Improve SRAM-based FPGA Robustness in Space and Avionics Applications. ACM Trans. Reconfigurable Technol. Syst. 4(1): 8:1-8:22 (2010) - [c8]Sohit Solanki, Fabio Frustaci, Pasquale Corsonello:
A Low-Leakage Single-Ended 6T SRAM Cell. ICETET 2010: 698-702 - [c7]Fabio Frustaci, Stefania Perri, Marco Lanuzza, Pasquale Corsonello:
A new low-power high-speed single-clock-cycle binary comparator. ISCAS 2010: 317-320 - [c6]Marco Lanuzza, Raffaele De Rose, Fabio Frustaci, Stefania Perri, Pasquale Corsonello:
Impact of Process Variations on Flip-Flops Energy and Timing Characteristics. ISVLSI 2010: 458-459 - [c5]Marco Lanuzza, Raffaele De Rose, Fabio Frustaci, Stefania Perri, Pasquale Corsonello:
Impact of Process Variations on Pulsed Flip-Flops: Yield Improving Circuit-Level Techniques and Comparative Analysis. PATMOS 2010: 180-189
2000 – 2009
- 2009
- [j4]Fabio Frustaci, Marco Lanuzza, Paolo Zicari, Stefania Perri, Pasquale Corsonello:
Low-power split-path data-driven dynamic logic. IET Circuits Devices Syst. 3(6): 303-312 (2009) - [j3]Fabio Frustaci, Marco Lanuzza, Paolo Zicari, Stefania Perri, Pasquale Corsonello:
Designing High-Speed Adders in Power-Constrained Environments. IEEE Trans. Circuits Syst. II Express Briefs 56-II(2): 172-176 (2009) - [c4]Marco Lanuzza, Paolo Zicari, Fabio Frustaci, Stefania Perri, Pasquale Corsonello:
An Efficient and Low-Cost Design Methodology to Improve SRAM-Based FPGA Robustness in Space and Avionics Applications. ARC 2009: 74-84 - [c3]Fabio Frustaci, Marco Lanuzza:
A New Optimized High-Speed Low-Power Data-Driven Dynamic (D3L) 32-Bit Kogge-Stone Adder. PATMOS 2009: 357-366 - 2008
- [j2]Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
High-performance noise-tolerant circuit techniques for CMOS dynamic logic. IET Circuits Devices Syst. 2(6): 537-548 (2008) - [c2]Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
A New Dynamic Logic Circuit Design for an Effective Trade-Off between Noise-Immunity, Performance and Energy Dissipation. PATMOS 2008: 277-286 - 2006
- [j1]Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
Techniques for Leakage Energy Reduction in Deep Submicrometer Cache Memories. IEEE Trans. Very Large Scale Integr. Syst. 14(11): 1238-1249 (2006) - [c1]Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
Leakage energy reduction techniques in deep submicron cache memories: a comparative study. ISCAS 2006
Coauthor Index
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