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Youfeng Wu
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2010 – 2019
- 2019
- [j7]Sunghyun Park, Youfeng Wu, Janghaeng Lee, Amir Aupov
, Scott A. Mahlke:
Multi-objective Exploration for Practical Optimization Decisions in Binary Translation. ACM Trans. Embed. Comput. Syst. 18(5s): 57:1-57:19 (2019) - 2017
- [c59]Florian Haas, Sebastian Weis, Theo Ungerer, Gilles Pokam, Youfeng Wu:
Fault-Tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support. ARCS 2017: 16-30 - [c58]Rajkishore Barik, Tatiana Shpeisman, Hongbo Rong, Chunling Hu, Victor W. Lee, Todd A. Anderson, Greg Henry, Hai Liu, Youfeng Wu, Paul Petersen, Geoff Lowney:
Mozart : Efficient Composition of Library Functions for Heterogeneous Execution. LCPC 2017: 182-202 - [c57]Guoyang Chen, Lei Zhang, Richa Budhiraja, Xipeng Shen
, Youfeng Wu:
Efficient support of position independence on non-volatile memory. MICRO 2017: 191-203 - [c56]Wenwen Wang, Pen-Chung Yew
, Antonia Zhai, Stephen McCamant, Youfeng Wu, Jayaram Bobba:
Enabling Cross-ISA Offloading for COTS Binaries. MobiSys 2017: 319-331 - 2016
- [c55]Florian Haas, Sebastian Weis, Theo Ungerer, Gilles Pokam, Youfeng Wu:
POSTER: Fault-tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support. PACT 2016: 421-422 - [c54]Sara S. Baghsorkhi, Nalini Vasudevan, Youfeng Wu:
FlexVec: auto-vectorization for irregular loops. PLDI 2016: 697-710 - [e1]Björn Franke, Youfeng Wu, Fabrice Rastello:
Proceedings of the 2016 International Symposium on Code Generation and Optimization, CGO 2016, Barcelona, Spain, March 12-18, 2016. ACM 2016, ISBN 978-1-4503-3778-6 [contents] - 2014
- [j6]Edson Borin, Guido Araujo, Maurício Breternitz Jr.
, Youfeng Wu:
Microcode Compression Using Structured-Constrained Clustering. Int. J. Parallel Program. 42(1): 140-164 (2014) - [c53]Hongbo Rong, Hyunchul Park, Youfeng Wu, Cheng Wang:
Just-In-Time Software Pipelining. CGO 2014: 11 - [c52]Zhijia Zhao, Bo Wu, Mingzhou Zhou, Yufei Ding, Jianhua Sun, Xipeng Shen
, Youfeng Wu:
Call sequence prediction through probabilistic calling automata. OOPSLA 2014: 745-762 - 2013
- [c51]Justin Emile Gottschlich, Gilles Pokam, Cristiano Pereira, Youfeng Wu:
Concurrent predicates: A debugging technique for every parallel programmer. PACT 2013: 331-340 - [c50]Cheng Wang, Youfeng Wu:
TSO_ATOMICITY: efficient hardware primitive for TSO-preserving region optimizations. ASPLOS 2013: 509-520 - [c49]Cheng Wang, Youfeng Wu, Marcelo Cintra:
Acceldroid: Co-designed acceleration of Android bytecode. CGO 2013: 3:1-3:10 - [c48]Youfeng Wu:
HW/SW co-designed acceleration of dynamic languages. LCTES 2013: 1-2 - [c47]Hongbo Rong, Hyunchul Park, Cheng Wang, Youfeng Wu:
Allocating rotating registers by scheduling. MICRO 2013: 346-358 - 2012
- [j5]Cheng Wang, Youfeng Wu:
From Locks to Correct and Efficient Transactional Memory. J. Circuits Syst. Comput. 21(2) (2012) - [c46]Liang Han, Xiaowei Jiang, Wei Liu, Youfeng Wu, James Tuck:
HiRe: using hint & release to improve synchronization of speculative threads. ICS 2012: 143-152 - [c45]Cheng Wang, Youfeng Wu, Hongbo Rong, Hyunchul Park:
SMARQ: Software-Managed Alias Register Queue for Dynamic Optimizations. MICRO 2012: 425-436 - 2011
- [c44]Cheng Wang, Youfeng Wu:
Modeling and Performance Evaluation of TSO-Preserving Binary Optimization. PACT 2011: 383-392 - [c43]Edson Borin, Youfeng Wu, Maurício Breternitz Jr.
, Cheng Wang:
LAR-CC: Large atomic regions with conditional commits. CGO 2011: 54-63 - [c42]Youfeng Wu, Shiliang Hu, Edson Borin, Cheng Wang:
A HW/SW co-designed heterogeneous multi-core virtual machine for energy-efficient general purpose computing. CGO 2011: 236-245 - [c41]Gilles Pokam, Cristiano Pereira, Shiliang Hu, Ali-Reza Adl-Tabatabai, Justin Emile Gottschlich, Jungwoo Ha, Youfeng Wu:
CoreRacer: a practical memory race recorder for multicore x86 TSO processors. MICRO 2011: 216-225 - [c40]Edson Borin, Guido Araujo, Maurício Breternitz Jr.
, Youfeng Wu:
Structure-Constrained Microcode Compression. SBAC-PAD 2011: 104-111 - 2010
- [c39]Edson Borin, Youfeng Wu, Cheng Wang, Wei Liu, Maurício Breternitz Jr.
, Shiliang Hu, Esfir Natanzon, Shai Rotem, Roni Rosner:
TAO: two-level atomicity for dynamic binary optimizations. CGO 2010: 12-21 - [c38]João Paulo Porto, Guido Araujo, Edson Borin, Youfeng Wu:
Trace Execution Automata in Dynamic Binary Translation. ISCA Workshops 2010: 99-116
2000 – 2009
- 2009
- [c37]Cheng Wang, Youfeng Wu, Edson Borin, Shiliang Hu, Wei Liu, Dave Sager, Tin-Fook Ngai, Jesse Fang:
Dynamic parallelization of single-threaded binary programs using speculative slicing. ICS 2009: 158-168 - [c36]Edson Borin, Youfeng Wu:
Characterization of DBT overhead. IISWC 2009: 178-187 - 2008
- [c35]Cheng Wang, Victor Ying, Youfeng Wu:
Supporting Legacy Binary Code in a Software Transaction Compiler with Dynamic Binary Translation and Optimization. CC 2008: 291-306 - [c34]Maurício Breternitz Jr.
, Gabriel H. Loh, Bryan Black, Jeff Rupley, Peter G. Sassone, Wesley Attrot, Youfeng Wu:
A Segmented Bloom Filter Algorithm for Efficient Predictors. SBAC-PAD 2008: 123-130 - 2007
- [c33]Cheng Wang, Shiliang Hu, Ho-Seop Kim, Sreekumar R. Nair, Maurício Breternitz Jr.
, Zhiwei Ying, Youfeng Wu:
StarDBT: An Efficient Multi-platform Dynamic Binary Translation System. Asia-Pacific Computer Systems Architecture Conference 2007: 4-15 - [c32]Cheng Wang, Wei-Yu Chen, Youfeng Wu, Bratin Saha, Ali-Reza Adl-Tabatabai:
Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language. CGO 2007: 34-48 - [c31]Cheng Wang, Ho-Seop Kim, Youfeng Wu, Victor Ying:
Compiler-Managed Software-based Redundant Multi-Threading for Transient Fault Detection. CGO 2007: 244-258 - [c30]Youfeng Wu, Maurício Breternitz Jr.
, Victor Ying:
Impacts of Multiprocessor Configurations on Workloads in Bioinformatics. SBAC-PAD 2007: 105-113 - 2006
- [j4]Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks:
Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. IEEE Micro 26(1): 119-129 (2006) - [c29]Bolei Guo, Youfeng Wu, Cheng Wang, Matthew J. Bridges, Guilherme Ottoni, Neil Vachharajani, Jonathan Chang, David I. August:
Selective Runtime Memory Disambiguation in a Dynamic Binary Translator. CC 2006: 65-79 - [c28]Jack Liu, Youfeng Wu:
Performance Characterization of the 64-bit x86 Architecture from Compiler Optimizations' Perspective. CC 2006: 155-169 - [c27]Edson Borin, Cheng Wang, Youfeng Wu, Guido Araujo:
Software-Based Transparent and Comprehensive Control-Flow Error Detection. CGO 2006: 333-345 - [c26]Edson Borin, Maurício Breternitz Jr.
, Youfeng Wu, Guido Araujo:
Clustering-Based Microcode Compression. ICCD 2006: 189-196 - [c25]Feng Qin, Cheng Wang, Zhenmin Li, Ho-Seop Kim, Yuanyuan Zhou, Youfeng Wu:
LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks. MICRO 2006: 135-148 - [c24]Chengliang Zhang, Chen Ding, Mitsunori Ogihara
, Yutao Zhong, Youfeng Wu:
A hierarchical model of data locality. POPL 2006: 16-29 - 2005
- [j3]Youfeng Wu, Yong-Fong Lee:
Hardware-Software Collaborative Techniques for Runtime Profiling and Phase Transition Detection. J. Comput. Sci. Technol. 20(5): 665-675 (2005) - [j2]Edson Borin, Cheng Wang, Youfeng Wu, Guido Araujo:
Dynamic binary control-flow errors detection. SIGARCH Comput. Archit. News 33(5): 15-20 (2005) - [c23]Youfeng Wu, Maurício Breternitz Jr.
, Herbert H. J. Hum, Ramesh V. Peri, Jay Pickett:
Enhanced code density of embedded CISC processors with echo technology. CODES+ISSS 2005: 160-165 - [c22]Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks:
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. MICRO 2005: 271-282 - 2004
- [c21]Youfeng Wu, Maurício Breternitz Jr.
, Tevi Devor:
Continuous Trip Count Profiling for Loop Optimizations in Two-Phase Dynamic Binary Translato. Interaction between Compilers and Computer Architectures 2004: 3-12 - [c20]Youfeng Wu, Yong-Fong Lee:
Exploiting Free Execution Slots on EPIC Processors for Efficient and Accurate Runtime Profiling. Asia-Pacific Computer Systems Architecture Conference 2004: 226-240 - [c19]Youfeng Wu, Maurício Breternitz Jr., Justin Quek, Orna Etzion, Jesse Fang:
The Accuracy of Initial Prediction in Two-Phase Dynamic Binary Translators. CGO 2004: 227-238 - 2003
- [c18]Li-Ling Chen, Youfeng Wu:
Aggressive Compiler Optimization and Parallelization with Thread-Level Speculation. ICPP 2003: 607-614 - [c17]Youfeng Wu, Li-Ling Chen, Roy Ju, Jesse Fang:
Performance potentials of compiler-directed data speculation. ISPASS 2003: 22-31 - 2002
- [c16]Youfeng Wu:
Accuracy of Profile Maintenance in Optimizing Compilers. Interaction between Compilers and Computer Architectures 2002: 27-38 - [c15]Youfeng Wu, Mauricio J. Serrano, Rakesh Krishnaiyer, Wei Li, Jesse Fang:
Value-Profile Guided Stride Prefetching for Irregular Code. CC 2002: 307-324 - [c14]Youfeng Wu, Ryan N. Rakvic, Li-Ling Chen, Chyi-Chang Miao, George Chrysos, Jesse Fang:
Compiler managed micro-cache bypassing for high performance EPIC processors. MICRO 2002: 134-145 - [c13]Youfeng Wu:
Efficient Discovery of Regular Stride Patterns in Irregular Programs. PLDI 2002: 210-221 - 2001
- [c12]Youfeng Wu, Utpal Banerjee, Yong-Fong Lee:
Calculation of Load Invalidation Rates for Data Speculation. PDCS 2001: 75-82 - [c11]Youfeng Wu, Dong-yuan Chen, Jesse Fang:
Better exploration of region-level value locality with integrated computation reuse and value prediction. ISCA 2001: 98-108 - 2000
- [c10]Hsien-Hsin S. Lee
, Youfeng Wu, Gary S. Tyson:
Quantifying instruction-level parallelism limits on an EPIC architecture. ISPASS 2000: 21-27
1990 – 1999
- 1999
- [c9]Youfeng Wu, Yong-Fong Lee:
Comprehensive Redundant Load Elimination for the IA-64 Architecture. LCPC 1999: 53-69 - 1996
- [c8]Pohua P. Chang, Dong-yuan Chen, Yong-Fong Lee, Youfeng Wu, Utpal Banerjee:
Bidirectional Scheduling: A New Global Code Scheduling Approach. LCPC 1996: 222-230 - 1995
- [j1]Youfeng Wu:
Strength Reduction of Multiplications by Integer Constants. ACM SIGPLAN Notices 30(2): 42-48 (1995) - 1994
- [c7]Youfeng Wu, James R. Larus:
Static branch frequency and program profile analysis. MICRO 1994: 1-11 - [c6]Bogong Su, Stanley Habib, Wei Zhao, Jian Wang, Youfeng Wu:
A study of pointer aliasing for software pipelining using run-time disambiguation. MICRO 1994: 112-117 - 1992
- [c5]Youfeng Wu:
Ordering functions for improving memory reference locality in a shared memory multiprocessor system. MICRO 1992: 218-221 - 1990
- [c4]Youfeng Wu, Ted G. Lewis:
Parallelizing WHILE Loops. ICPP (2) 1990: 1-8 - [c3]Youfeng Wu, Ted G. Lewis:
Parallel Algorithms for Decomposable Linear Programs. ICPP (3) 1990: 27-34 - [c2]Youfeng Wu, Ted G. Lewis:
Parallelism Encapsulation in C++. ICPP (2) 1990: 35-42
1980 – 1989
- 1989
- [c1]Youfeng Wu, Ted G. Lewis:
Parallel processor balance through loop spreading. SC 1989: 665-674
Coauthor Index
aka: Maurício Breternitz Jr.

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