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2000 – 2009
- 2003
[j3]Ming-Dou Ker, Tung-Yang Chen:
Substrate-triggered ESD protection circuit without extra process modification. IEEE J. Solid State Circuits 38(2): 295-302 (2003)- 2001
- [j2]Ming-Dou Ker, Tung-Yang Chen, Tai-Ho Wang, Chung-Yu Wu:
On-chip ESD protection design by using polysilicon diodes in CMOS process. IEEE J. Solid State Circuits 36(4): 676-686 (2001) - [c7]Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Win:
ESD protection design in a 0.18-um salicide CMOS technology by using substrate-triggered technique. ISCAS (4) 2001: 754-757 - [c6]Ming-Dou Ker, Tung-Yang Chen:
Design on the turn-on efficient power-rail ESD clamp circuit with stacked polysilicon diodes. ISCAS (4) 2001: 758-761 - [c5]Tung-Yang Chen, Ming-Dou Ker:
Design on ESD Protection Circuit with Very Low and Constant Input Capacitance. ISQED 2001: 247-248 - [c4]Ming-Dou Ker, Wen-Yu Lo, Tung-Yang Chen, Howard Tang, S.-S. Chen, Mu-Chun Wang
:
Compact Layout Rule Extraction for Latchup Prevention in a 0.25-?m Shallow-Trench-Isolation Silicided Bulk CMOS Process. ISQED 2001: 267-272 - 2000
- [j1]Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Wu, Hun-Hsien Chang:
ESD protection design on analog pin with very low input capacitance for high-frequency or current-mode applications. IEEE J. Solid State Circuits 35(8): 1194-1199 (2000) - [c3]Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Wu, Hun-Hsien Chang:
Design and analysis of the on-chip ESD protection circuit with a constant input capacitance for high-precision analog applications. ISCAS 2000: 61-64
1990 – 1999
- 1999
- [c2]Ming-Dou Ker, Hun-Hsien Chang, Tung-Yang Chen:
ESD buses for whole-chip ESD protection. ISCAS (1) 1999: 545-548 - 1998
- [c1]Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Wu:
CMOS on-chip ESD protection design with substrate-triggering technique. ICECS 1998: 273-276
Coauthor Index
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