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Journal Articles
- 2022
[j3]Taejoong Song
, Hoonki Kim, Woojin Rim, Hakchul Jung, Changnam Park, Inhak Lee, Sanghoon Baek, Jonghoon Jung:
A 3-nm Gate-All-Around SRAM Featuring an Adaptive Dual-Bitline and an Adaptive Cell-Power Assist Circuit. IEEE J. Solid State Circuits 57(1): 236-244 (2022)- 2017
- [j2]Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim, Giyong Yang, Hoonki Kim, Sanghoon Baek, Jonghoon Jung, Bongjae Kwon, Sungwee Cho, Hyuntaek Jung, Yongjae Choo, Jaeseung Choi:
A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization. IEEE J. Solid State Circuits 52(1): 240-249 (2017) - 2015
- [j1]Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang, Jaeho Park, Sunghyun Park, Yongho Kim, Kang-Hyun Baek, Sanghoon Baek, Sang-Kyu Oh, Jinsuk Jung, Sungbong Kim, Gyu-Hong Kim, Jintae Kim, Young-Keun Lee, Sang-Pil Sim, Jong Shik Yoon, Kyu-Myung Choi, Hyo-Sig Won, Jaehong Park:
A 14 nm FinFET 128 Mb SRAM With VMIN Enhancement Techniques for Low-Power Applications. IEEE J. Solid State Circuits 50(1): 158-169 (2015)
Conference and Workshop Papers
- 2022
- [c7]Taejoong Song, Hakchul Jung, Giyoung Yang, Hoyoung Tang, Hayoung Kim, Dongwook Seo, Hoonki Kim, Woojin Rim, Sanghoon Baek, Sangyeop Baeck, Jonghoon Jung:
3nm Gate-All-Around (GAA) Design-Technology Co-Optimization (DTCO) for succeeding PPA by Technology. CICC 2022: 1-7 - [c6]Giyoung Yang, Hakchul Jung, Jinyoung Lim, Jaewoo Seo, Ingyum Kim, Jisu Yu, Hyeoungyu You, Jeongsoon Kong, Garoom Kim, Minjae Jeong, Chanhee Park, Sera An, Woojin Rim, Hayoung Kim, Dalhee Lee, Sanghoon Baek, Jonghoon Jung, Taejoong Song, Jongwook Kye:
Standard Cell Design Optimization with Advanced MOL Technology in 3nm GAA Process. VLSI Technology and Circuits 2022: 363-364 - 2021
- [c5]Taejoong Song, Woojin Rim, Hoonki Kim, Keun Hwi Cho, Taeyeong Kim, Taejung Lee, Geumjong Bae, Dong-Won Kim, S. D. Kwon, Sanghoon Baek, Jonghoon Jung, Jongwook Kye, Hakchul Jung, Hyungtae Kim, Soon-Moon Jung, Jaehong Park:
24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit. ISSCC 2021: 338-340 - 2018
- [c4]Taejoong Song, Jonghoon Jung, Woojin Rim, Hoonki Kim, Yongho Kim, Changnam Park, Jeongho Do, Sunghyun Park, Sungwee Cho, Hyuntaek Jung, Bongjae Kwon, Hyun-Su Choi, Jaeseung Choi, Jong Shik Yoon:
A 7nm FinFET SRAM using EUV lithography with dual write-driver-assist circuitry for low-voltage applications. ISSCC 2018: 198-200 - 2017
- [c3]Taejoong Song, Hoonki Kim, Woojin Rim, Yongho Kim, Sunghyun Park, Changnam Park, Minsun Hong, Giyong Yang, Jeongho Do, Jinyoung Lim, Seungyoung Lee, Ingyum Kim, Sanghoon Baek, Jonghoon Jung, Daewon Ha, Hyungsoon Jang, Taejung Lee, Chul-Hong Park, Bongjae Kwon, Hyuntaek Jung, Sungwee Cho, Yongjae Choo, Jaeseung Choi:
12.2 A 7nm FinFET SRAM macro using EUV lithography for peripheral repair analysis. ISSCC 2017: 208-209 - 2016
- [c2]Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim, Jonghoon Jung, Giyong Yang, Sanghoon Baek, Jaeseung Choi, Bongjae Kwon, Yunwoo Lee, Sungbong Kim, Gyu-Hong Kim, Hyo-Sig Won, Ja-Hum Ku, Sunhom Steve Paak, E. S. Jung, Steve Sungho Park, Kinam Kim:
17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization. ISSCC 2016: 306-307 - 2014
- [c1]Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang, Jaeho Park, Sunghyun Park, Kang-Hyun Baek, Sanghoon Baek, Sang-Kyu Oh, Jinsuk Jung, Sungbong Kim, Gyu-Hong Kim, Jintae Kim, Young-Keun Lee, Kee Sup Kim, Sang-Pil Sim, Jong Shik Yoon, Kyu-Myung Choi:
13.2 A 14nm FinFET 128Mb 6T SRAM with VMIN-enhancement techniques for low-power applications. ISSCC 2014: 232-233
Coauthor Index
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