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ORCIDGurshaant Singh Malik
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2020 – today
- 2022
[j1]Gurshaant Malik
, Ian Elmor Lang, Rodolfo Pellizzoni, Nachiket Kapre:
HopliteML: Evolving Application Customized FPGA NoCs with Adaptable Routers and Regulators. ACM Trans. Reconfigurable Technol. Syst. 15(4): 40:1-40:33 (2022)- 2021
- [i3]Narsimha Chilkuri, Eric Hunsberger, Aaron Voelker, Gurshaant Malik, Chris Eliasmith:
Language Modeling using LMUs: 10x Better Data Efficiency or Improved Scaling Compared to Transformers. CoRR abs/2110.02402 (2021) - 2020
- [c8]Gurshaant Malik, Ian Elmor Lang, Rodolfo Pellizzoni, Nachiket Kapre:
Learn the Switches: Evolving FPGA NoCs with Stall-Free and Backpressure Based Routers. FPL 2020: 18-25 - [c7]Gurshaant Singh Malik, Lucian Petrica, Nachiket Kapre, Michaela Blott:
DarwiNN: efficient distributed neuroevolution under communication constraints. GECCO Companion 2020: 141-142 - [i2]Peter Blouw, Gurshaant Malik, Benjamin Morcos, Aaron R. Voelker, Chris Eliasmith:
Hardware Aware Training for Efficient Keyword Spotting on General Purpose and Specialized Hardware. CoRR abs/2009.04465 (2020)
2010 – 2019
- 2019
- [c6]Gurshaant Singh Malik, Nachiket Kapre:
Enhancing Butterfly Fat Tree NoCs for FPGAs with Lightweight Flow Control. FCCM 2019: 154-162 - [c5]Gurshaant Singh Malik, Nachiket Kapre:
Enhancing Butterfly Fat Tree NoCs for FPGAs with Lightweight Flow Control. FPGA 2019: 308 - [c4]Long Chung Chan, Gurshaant Malik, Nachiket Kapre:
Partitioning FPGA-Optimized Systolic Arrays for Fun and Profit. FPT 2019: 144-152 - 2016
- [i1]Gurshaant Malik, Krishna Gupta, Raunak Dharani, K. Madhava Krishna:
FPGA based hybrid architecture for parallelizing RRT. CoRR abs/1607.05704 (2016) - 2015
- [c3]Gurshaant Singh Malik, Krishna Gupta, K. Madhava Krishna, Shubhajit Roy Chowdhury:
FPGA based hierarchical architecture for parallelizing RRT. AIR 2015: 12:1-12:6 - [c2]M. Siva Karthik, Sudhanshu Mittal, Gurshaant Malik, K. Madhava Krishna:
Decision theoretic search for small objects through integrating far and near cues. ECMR 2015: 1-6 - [c1]Gurshaant Singh Malik, Krishna Gupta, K. Madhava Krishna, Shubhajit Roy Chowdhury:
FPGA based combinatorial architecture for parallelizing RRT. ECMR 2015: 1-6
Coauthor Index
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