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2020 – today
- 2025
[j5]Lalit Bandil
, Bal Chand Nagar:
SIEAA: Significant input extraction-based error optimized approximate adder for error resilient application. Integr. 101: 102317 (2025)- 2024
- [j4]Lalit Bandil, Bal Chand Nagar:
Modified restoring array-based power efficient approximate square root circuit and its application. Integr. 94: 102106 (2024) - [j3]Umayia Mushtaq, Md. Waseem Akram, Dinesh Prasad, Aminul Islam, Bal Chand Nagar:
Impact of Variability on Novel Transistor Configurations in Adder Circuits at 7nm FinFET Technology. J. Circuits Syst. Comput. 33(13): 2450237:1-2450237:20 (2024) - [j2]Lalit Bandil, Bal Chand Nagar:
Hardware Implementation of Unsigned Approximate Hybrid Square Rooters for Error-Resilient Applications. IEEE Trans. Computers 73(12): 2734-2746 (2024) - [c2]Lalit Bandil, Bal Chand Nagar:
Dynamic Input Pruning-Based Low-Power and Error-Optimized Approximate Adder. ICCCNT 2024: 1-4 - [c1]Shekhar Suman Borah, Mourina Ghosh, Bal Chand Nagar, Prabha Sundaravadivel:
Design and Analysis of an Electronically Tunable VDTA-Based Quadrature Oscillator. ISVLSI 2024: 704-707
2010 – 2019
- 2016
- [j1]Rajeev K. Ranjan, Chandan Kr. Choubey, Bal Chand Nagar, Sajal K. Paul:
Comb Filter for Elimination of Unwanted Power Line Interference in Biomedical Signal. J. Circuits Syst. Comput. 25(6): 1650052:1-1650052:14 (2016)
Coauthor Index
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