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ORCIDMohit Gupta 0004
Person information
- affiliation: imec, Leuven, Belgium
- affiliation: KU Leuven, Department ESAT-MICAS, Belgium
- affiliation: Aligarh Muslim University, Department of Electronics Engineering, India
Other persons with the same name
- Mohit Gupta — disambiguation page
- Mohit Gupta 0001
![[0000-0002-2323-7700]](https://dblp.org/img/orcid-mark.12x12.png "0000-0002-2323-7700")
— University of Wisconsin-Madison, WI, USA (and 2 more) - Mohit Gupta 0002 — University of California at Berkeley, School of Information, CA, USA
- Mohit Gupta 0003 — Visvesvaraya National Institute of Technology, Department of Computer Science and Engineering, Nagpur, India
- Mohit Kumar Gupta — disambiguation page
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2020 – today
- 2024
[j6]Pengbo Yu, Flavio Ponzina, Alexandre Levisse, Mohit Gupta, Dwaipayan Biswas, Giovanni Ansaloni, David Atienza, Francky Catthoor:
An Energy Efficient Soft SIMD Microarchitecture and Its Application on Quantized CNNs. IEEE Trans. Very Large Scale Integr. Syst. 32(6): 1018-1031 (2024)- 2023
- [j5]Saeideh Alinezhad Chamazcoti, Mohit Gupta, Hyungrock Oh, Timon Evenblij, Francky Catthoor, Manu Perumkunnil Komalan, Gouri Sankar Kar, Arnaud Furnémont:
Exploring Pareto-Optimal Hybrid Main Memory Configurations Using Different Emerging Memories. IEEE Trans. Circuits Syst. I Regul. Pap. 70(2): 733-746 (2023) - [c7]Mohit Gupta, Stefan Cosemans, Peter Debacker, Wim Dehaene:
A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W. ESSCIRC 2023: 417-420 - [c6]Mohit Kumar Gupta, Manu Perumkunnil, Dwaipayan Biswas, Saeideh Alinezhad Chamazcoti, Gouri Sankar Kar, Arnaud Furnémont, Julien Ryckaert:
Design Technology co-optimization of 1D-1VCMA to improve read performance for SCM applications. ISCAS 2023: 1-5 - [c5]Mohit Kumar Gupta, Pieter Weckx, Manu Perumkunnil Komalan, Julien Ryckaert:
Impact of interconnects enhancement on SRAM design beyond 5nm technology node. ISCAS 2023: 1-5 - 2022
- [j4]Tommaso Marinelli, José Ignacio Gómez Pérez, Christian Tenllado, Manu Komalan, Mohit Gupta, Francky Catthoor:
Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices. ACM Trans. Embed. Comput. Syst. 21(1): 3:1-3:20 (2022) - [c4]Abhairaj Singh, Mahdi Zahedi, Taha Shahroodi, Mohit Gupta, Anteneh Gebregiorgis, Manu Komalan, Rajiv V. Joshi, Francky Catthoor, Rajendra Bishnoi, Said Hamdioui:
CIM-based Robust Logic Accelerator using 28 nm STT-MRAM Characterization Chip Tape-out. AICAS 2022: 451-454 - [c3]Mohit Gupta, Manu Perumkunnil, Andrea Fantini, Saeideh Alinezhad Chamazcoti, Woojin Kim, Marie Garcia Bardon, Gouri Sankar Kar, Arnaud Furnémont:
Design exploration of IGZO diode based VCMA array design for Storage Class Memory Applications. ESSDERC 2022: 241-244 - [i1]Pengbo Yu, Alexandre Levisse, Mohit Gupta, Timon Evenblij, Giovanni Ansaloni, Francky Catthoor, David Atienza:
A Soft SIMD Based Energy Efficient Computing Microarchitecture. CoRR abs/2212.09358 (2022)
2010 – 2019
- 2017
- [j3]Sayeed Ahmad, Mohit Kumar Gupta, Naushad Alam, Mohd. Hasan:
Low Leakage Single Bitline 9 T (SB9T) Static Random Access Memory. Microelectron. J. 62: 1-11 (2017) - [c2]Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Dmitry Yakimets, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene:
Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7. ESSDERC 2017: 256-259 - [c1]Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene:
Dedicated technology threshold voltage tuning for 6T SRAM beyond N7. ICICDT 2017: 1-4 - 2016
- [j2]Mohit Kumar Gupta, Mohd. Hasan:
A Low-Power Robust Easily Cascaded PentaMTJ-Based Combinational and Sequential Circuits. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 218-222 (2016) - [j1]Sayeed Ahmad, Mohit Kumar Gupta, Naushad Alam, Mohd. Hasan:
Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell. IEEE Trans. Very Large Scale Integr. Syst. 24(8): 2634-2642 (2016)
Coauthor Index
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