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Won Lee
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2020 – today
- 2024
- [j4]Kwanyeob Chae
, Jaegeun Song, Yoonjae Choi
, Jiyeon Park, Billy Koo, Jihun Oh, Shinyoung Yi, Won Lee, Dongha Kim, Kyeongkeun Kang, Eunsu Kim, Juyoung Kim, Sanghune Park, Sungcheol Park, Mijung Noh, Hyo-Gyuem Rhew, Jongshin Shin
:
A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection. IEEE J. Solid State Circuits 59(1): 231-242 (2024) - 2023
- [c5]Kwanyeob Chae, Jiyeon Park, Jaegeun Song, Billy Koo, Jihun Oh, Shinyoung Yi, Won Lee, Dongha Kim, Taekyung Yeo, Kyeongkeun Kang, Sangsoo Park, Eunsu Kim, Sukhyun Jung, Sanghune Park, Sungcheol Park, Mijung Noh, Hyo-Gyuem Rhew, Jongshin Shin:
A 4nm 1.15TB/s HBM3 Interface with Resistor-Tuned Offset-Calibration and In-Situ Margin-Detection. ISSCC 2023: 406-407 - 2022
- [j3]Ivan Chase, Darius Coelho, Won Lee, Klaus Mueller, James P. Curley
:
Networks never rest: An investigation of network evolution in three species of animals. Soc. Networks 68: 356-373 (2022)
2010 – 2019
- 2019
- [c4]Kwanyeob Chae, JongRyun Choi, Hyungkwon Lee, Jinho Choi, Shinyoung Yi, Yoonjee Nam, Sangyun Hwang, Joohyung Lee, Won Lee, Kihwan Seong, Joohee Shin, Soo-Min Lee, Seokkyun Ko, Jihun Oh, Billy Koo, Sanghune Park, Jongshin Shin, Hyungjong Ko:
An 8nm All-Digital 7.3Gb/s/pin LPDDR5 PHY with an Approximate Delay Compensation Scheme. VLSI Circuits 2019: 96- - 2016
- [c3]Kwanyeob Chae, JongRyun Choi, Shinyoung Yi, Won Lee, Sanghoon Joo, Hyunhyuck Kim, Hyungkwon Yi, Yoonjee Nam, Jinho Choi, Sanghune Park, Sanghyun Lee:
A 690mV 4.4Gbps/pin all-digital LPDDR4 PHY in 10nm FinFET technology. ESSCIRC 2016: 461-464 - 2013
- [c2]Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Won Lee, Seong-Ook Jung:
All-digital 90° phase-shift DLL with a dithering jitter suppression scheme. CICC 2013: 1-4 - 2012
- [j2]Heechai Kang, Kyungho Ryu, Dong-Hoon Jung, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung:
Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(10): 2186-2196 (2012) - 2010
- [c1]Heechai Kang, Kyungho Ryu, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung:
Process variation tolerant all-digital multiphase DLL for DDR3 interface. CICC 2010: 1-4
1980 – 1989
- 1985
- [j1]Won Lee, Kyu Park, Song Park:
A QNAR-AGC estimator with reduced arithmetic complexity. IEEE Trans. Acoust. Speech Signal Process. 33(5): 1111-1113 (1985)
Coauthor Index
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last updated on 2024-04-25 05:50 CEST by the dblp team
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