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2010 – 2019
- 2011
[j2]Samuel Rodrigo, José Flich
, Antoni Roca, Simone Medardoni, Davide Bertozzi, Jesús Camacho Villanueva, Federico Silla, José Duato:
Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(4): 534-547 (2011)- 2010
- [c12]Samuel Rodrigo, José Flich, Antoni Roca, Simone Medardoni, Davide Bertozzi, Jesús Camacho Villanueva, Federico Silla, José Duato:
Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing. NOCS 2010: 25-32 - [c11]Francisco Gilabert Villamón, María Engracia Gómez, Simone Medardoni, Davide Bertozzi:
Improved Utilization of NoC Channel Bandwidth by Switch Replication for Cost-Effective Multi-processor Systems-on-Chip. NOCS 2010: 165-172
2000 – 2009
- 2009
- [b1]Simone Medardoni:
Driving the Network-on-Chip Revolution to Remove the Interconnect Bottleneck in Nanoscale Multi-Processor Systems-on-Chip. University of Ferrara, Italy, 2009 - [j1]Samuel Rodrigo, Simone Medardoni, José Flich, Davide Bertozzi, José Duato:
Efficient implementation of distributed routing algorithms for NoCs. IET Comput. Digit. Tech. 3(5): 460-475 (2009) - [c10]Francisco Gilabert Villamón, Daniele Ludovici, Simone Medardoni, Davide Bertozzi, Luca Benini, Georgi Nedeltchev Gaydadjiev:
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints. CISIS 2009: 681-687 - [c9]Daniele Ludovici, Francisco Gilabert Villamón, Simone Medardoni, Crispín Gómez Requena, María Engracia Gómez, Pedro López, Georgi Nedeltchev Gaydadjiev, Davide Bertozzi:
Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints. DATE 2009: 562-565 - [c8]Tor Skeie, Frank Olaf Sem-Jacobsen, Samuel Rodrigo, José Flich, Davide Bertozzi, Simone Medardoni:
Flexible DOR routing for virtualization of multicore chips. SoC 2009: 73-76 - [c7]Samuel Rodrigo, Carles Hernández, José Flich, Federico Silla, José Duato, Simone Medardoni, Davide Bertozzi, Andres Mejia, Donglai Dai:
Yield-oriented evaluation methodology of network-on-chip routing implementations. SoC 2009: 100-105 - 2008
- [c6]Simone Medardoni, Marcello Lajolo, Davide Bertozzi:
Variation tolerant NoC design by means of self-calibrating links. DATE 2008: 1402-1407 - [c5]Alberto Ferrante, Simone Medardoni, Davide Bertozzi:
Network Interface Sharing Techniques for Area Optimized NoC Architectures. DSD 2008: 10-17 - [c4]Francisco Gilabert Villamón, Simone Medardoni, Davide Bertozzi, Luca Benini, María Engracia Gómez, Pedro López, José Duato:
Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework. NOCS 2008: 107-116 - 2007
- [c3]Simone Medardoni, Martino Ruggiero, Davide Bertozzi, Luca Benini, Giovanni Strano, Carlo Pistritto:
Interactive presentation: Capturing the interaction of the communication, memory and I/O subsystems in memory-centric industrial MPSoC platforms. DATE 2007: 660-665 - [c2]Simone Medardoni, Davide Bertozzi, Enrico Macii:
Power-optimal RTL arithmetic unit soft-macro selection strategy for leakage-sensitive technologies. ISLPED 2007: 159-164 - [c1]Simone Medardoni, Davide Bertozzi, Luca Benini, Enrico Macii:
Control and datapath decoupling in the design of a NoC switch: area, power and performance implications. SoC 2007: 1-4
Coauthor Index
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