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Robert Suszynski
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2020 – today
- 2025
[c22]Lukasz Golka, Pawel Poczekajlo, Robert Suszynski:
The Concept of Self-Adaptive Dynamic Reconfiguration in FPGA-Based DSP Systems. KES 2025: 2532-2541
[c21]Lukasz Golka, Robert Suszynski, Pawel Poczekajlo:
Forth Language Extensions for DSP: Configurable FIFO and LIFO Structures. KES 2025: 2542-2551
[c20]Piotr Maciolek, Robert Suszynski, Aneta Hapka, Karolina Napiórkowska:
Monitoring the Efficiency of Automatic Screens Based on Computational Analysis of Wastewater Level Variations. KES 2025: 3182-3191- 2024
[c19]Pawel Poczekajlo, Lukasz Golka, Robert Suszynski, Patryk Widulinski:
The concept of multicore computing and processing in a field-programmable gate array chip. KES 2024: 2400-2409
[c18]Pawel Poczekajlo, Robert Suszynski, Andrzej Antosz:
Engineering energy measurement system and data analising for an electric elevator. KES 2024: 2410-2418
[c17]Lukasz Golka, Pawel Poczekajlo, Robert Suszynski:
Implementation of a universal replicable DSP core in FPGA devices for cascade audio signal processing applications. KES 2024: 2429-2438- 2023
[c16]Pawel Poczekajlo, Robert Suszynski:
An attempt at the possibility of using multi-output paraunitary filters for image processing for astrophotography trackers. KES 2023: 2754-2762
[c15]Pawel Poczekajlo
, Robert Suszynski, Andrzej Antosz:
The use of modern methods of virtualization and shared network functions to optimize the resources used. KES 2023: 2773-2780- 2021
[c14]Pawel Poczekajlo
, Robert Suszynski:
Modern computing methods for digital signal processing engineering systems. KES 2021: 3534-3541
[c13]Robert Suszynski, Pawel Poczekajlo
:
The latest developments in computer science and their impact on space exploration. KES 2021: 4386-4395
2010 – 2019
- 2018
[c12]Jacek Kaczmarek, Robert Suszynski:
Application of Semi-Analytical Recursive Convolution Algorithms for Designing of Buck DC-DC Converter. MWSCAS 2018: 869-872- 2017
[c11]Robert Suszynski:
Quick method for parameter research of higher order sigma-delta modulators using dynamically reprogrammable FPAA. MIXDES 2017: 314-317
[c10]Krzysztof Wawryn
, Robert Suszynski:
Prototyping of WTA ANNs using FPAA devices. MIXDES 2017: 463-467
[c9]Jacek Kaczmarek, Robert Suszynski:
Digital control buck converter - Reducing the impact of load change on the output voltage. MIXDES 2017: 479-483
[c8]Jacek Kaczmarek, Robert Suszynski:
Undesirable sub-harmonic currents in the coil of buck converter prototype - Project bumblebee. MIXDES 2017: 494-497
[c7]Jacek Kaczmarek, Robert Suszynski:
Semi-analytical recursive algorithms of convolution calculations for digitally controlled buck converter design. MIXDES 2017: 537-542- 2016
[c6]Robert Suszynski, Jacek Marciniak, Krzysztof Wawryn:
An artificial neural network for classification a quality of a coal fuel in combustion chambers using FPAA. MIXDES 2016: 160-163- 2011
[j1]Krzysztof Wawryn, Robert Suszynski, Bogdan Strzeszewski
:
A Low Power Digitally Error corrected 2.5 Bit per Stage Pipelined a/d converter Using Current-Mode Signals. J. Circuits Syst. Comput. 20(1): 29-43 (2011)
2000 – 2009
- 2006
[c5]Robert Suszynski, Krzysztof Wawryn:
FPAA Prototyping of ΣΔ Analog Digital Converters. ICECS 2006: 906-909- 2005
[c4]Krzysztof Wawryn, Robert Suszynski, Bogdan Strzeszewski
:
Current mode pipelined a/d converter. ICECS 2005: 1-4- 2004
[c3]Krzysztof Wawryn, Robert Suszynski, Bogdan Strzeszewski:
Signal processing building blocks for pipelined A/D converter. ICECS 2004: 258-261- 2000
[c2]Robert Suszynski:
Experimental circuit with current mode ΣΔ modulators with switched transconductance. ICECS 2000: 133-136
1990 – 1999
- 1999
[c1]Robert Suszynski:
Measuring and experimental results of current mode ΣΔ modulators with switched transconductance. ICECS 1999: 1515-1518
Coauthor Index

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