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2020 – today
- 2024
[j3]Junnosuke Suzuki
, Jaehoon Yu, Mari Yasunaga, Ángel López García-Arias, Yasuyuki Okoshi, Shungo Kumazawa, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura:
Pianissimo: A Sub-mW Class DNN Accelerator With Progressively Adjustable Bit-Precision. IEEE Access 12: 2057-2073 (2024)- [j2]Hikari Otsuka, Yasuyuki Okoshi, Ángel López García-Arias, Kazushi Kawamura, Thiem Van Chu, Daichi Fujiki, Masato Motomura:
Restricted Random Pruning at Initialization for High Compression Range. Trans. Mach. Learn. Res. 2024 (2024) - [c9]Akihiro Shioda, Ángel López García-Arias, Hikari Otsuka, Yuki Ichikawa, Yasuyuki Okoshi, Kazushi Kawamura, Thiem Van Chu, Daichi Fujiki, Masato Motomura:
Exploiting N:M Sparsity in Quantized-Folded ResNets: Signed Multicoat Supermasks and Iterative Pruning-Quantization. CANDAR 2024: 224-230 - [i3]Hikari Otsuka, Daiki Chijiwa, Ángel López García-Arias, Yasuyuki Okoshi, Kazushi Kawamura, Thiem Van Chu, Daichi Fujiki, Susumu Takeuchi, Masato Motomura:
Partial Search in a Frozen Network is Enough to Find a Strong Lottery Ticket. CoRR abs/2402.14029 (2024) - 2023
- [j1]Ángel López García-Arias, Yasuyuki Okoshi, Masanori Hashimoto, Masato Motomura, Jaehoon Yu:
Recurrent Residual Networks Contain Stronger Lottery Tickets. IEEE Access 11: 16588-16604 (2023) - [c8]Kazushi Kawamura, Jaehoon Yu, Daiki Okonogi, Satoru Jimbo, Genta Inoue, Akira Hyodo, Ángel López García-Arias, Kota Ando, Bruno Hideki Fukushima-Kimura, Ryota Yasudo, Thiem Van Chu, Masato Motomura:
Amorphica: 4-Replica 512 Fully Connected Spin 336MHz Metamorphic Annealer with Programmable Optimization Strategy and Compressed-Spin-Transfer Multi-Chip Extension. ISSCC 2023: 42-43 - [c7]Jiale Yan, Hiroaki Ito, Ángel López García-Arias, Yasuyuki Okoshi, Hikari Otsuka, Kazushi Kawamura, Thiem Van Chu, Masato Motomura:
Multicoated and Folded Graph Neural Networks With Strong Lottery Tickets. LoG 2023: 11 - [c6]Junnosuke Suzuki, Jaehoon Yu, Mari Yasunaga, Ángel López García-Arias, Yasuyuki Okoshi, Shungo Kumazawa, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura:
Pianissimo: A Sub-mW Class DNN Accelerator with Progressive Bit-by-Bit Datapath Architecture for Adaptive Inference at Edge. VLSI Technology and Circuits 2023: 1-2 - [i2]Jiale Yan, Hiroaki Ito, Ángel López García-Arias, Yasuyuki Okoshi, Hikari Otsuka, Kazushi Kawamura, Thiem Van Chu, Masato Motomura:
Multicoated and Folded Graph Neural Networks with Strong Lottery Tickets. CoRR abs/2312.03236 (2023) - 2022
- [c5]Yasuyuki Okoshi, Ángel López García-Arias, Kazutoshi Hirose, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura, Jaehoon Yu:
Multicoated Supermasks Enhance Hidden Networks. ICML 2022: 17045-17055 - [c4]Kazutoshi Hirose, Jaehoon Yu, Kota Ando, Yasuyuki Okoshi, Ángel López García-Arias, Junnosuke Suzuki, Thiem Van Chu, Kazushi Kawamura, Masato Motomura:
Hiddenite: 4K-PE Hidden Network Inference 4D-Tensor Engine Exploiting On-Chip Model Construction Achieving 34.8-to-16.0TOPS/W for CIFAR-100 and ImageNet. ISSCC 2022: 1-3 - 2021
- [c3]Ángel López García-Arias, Masanori Hashimoto, Masato Motomura, Jaehoon Yu:
Hidden-Fold Networks: Random Recurrent Residuals Using Sparse Supermasks. BMVC 2021: 205 - [i1]Ángel López García-Arias, Masanori Hashimoto, Masato Motomura, Jaehoon Yu:
Hidden-Fold Networks: Random Recurrent Residuals Using Sparse Supermasks. CoRR abs/2111.12330 (2021) - 2020
- [c2]Ángel López García-Arias, Jaehoon Yu, Masanori Hashimoto:
Low-Cost Reservoir Computing using Cellular Automata and Random Forests. ISCAS 2020: 1-5
2010 – 2019
- 2018
- [c1]Tobias Alonso, Mario Ruiz, Angel Lopez Garcia-Arias, Gustavo Sutter, Jorge E. López de Vergara:
Submicrosecond Latency Video Compression in a Low-End FPGA-based System-on-Chip. FPL 2018: 355-359
Coauthor Index
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