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ORCIDShathanaa Rajmohan
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2020 – today
- 2023
[j7]S. R. Sreeja
, Shathanaa Rajmohan, Manjit Singh Sodhi, Debasis Samanta, Pabitra Mitra:
Dictionary Learning and Greedy Algorithms for Removing Eye Blink Artifacts from EEG Signals. Circuits Syst. Signal Process. 42(9): 5663-5683 (2023)- [j6]Shathanaa Rajmohan, N. Ramasubramanian:
Improved Symbiotic organisms search for path planning of unmanned combat aerial vehicles. J. Ambient Intell. Humaniz. Comput. 14(4): 4289-4311 (2023) - [j5]Shathanaa Rajmohan, E. Elakkiya, S. R. Sreeja:
Multi-cohort whale optimization with search space tightening for engineering optimization problems. Neural Comput. Appl. 35(12): 8967-8986 (2023) - [i1]Prameela Madambakam, Shathanaa Rajmohan, Himangshu Sharma, Tummepalli Anka Chandrahas Purushotham Gupta:
SLJP: Semantic Extraction based Legal Judgment Prediction. CoRR abs/2312.07979 (2023) - 2022
- [c2]Shathanaa Rajmohan, Mani Tej Mendem, Shankar Sreenu Vanam, Pavan Kumar Thalapally:
Online Grading of Fruits using Deep Learning Models and Computer Vision. ICIMMI 2022: 5:1-5:8 - 2021
- [j4]Shathanaa Rajmohan, N. Ramasubramanian, Nagi Naganathan:
Design Space Exploration for Reducing Cost of Hardware Trojan Detection and Isolation during Architectural Synthesis. J. Circuits Syst. Comput. 30(9): 2150156:1-2150156:27 (2021) - 2020
- [j3]Shathanaa Rajmohan, Ramasubramanian Natarajan:
A Memetic Algorithm-Based Design Space Exploration for Datapath Resource Allocation During High-Level Synthesis. J. Circuits Syst. Comput. 29(1): 2050001:1-2050001:30 (2020) - [j2]Shathanaa Rajmohan, N. Ramasubramanian, Nagi Naganathan:
Hybrid Evolutionary Design Space Exploration Algorithm With Defence Against Third Party IP Vulnerabilities. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2602-2614 (2020)
2010 – 2019
- 2019
- [j1]Shathanaa Rajmohan, Ramasubramanian Natarajan:
Group influence based improved firefly algorithm for Design Space Exploration of Datapath resource allocation. Appl. Intell. 49(6): 2084-2100 (2019) - 2018
- [c1]Shathanaa Rajmohan, Ramasubramanian Natarajan:
Improving Power & Latency Metrics for Hardware Trojan Detection During High Level Synthesis. ICCCNT 2018: 1-7
Coauthor Index
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