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ORCIDIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 39
Volume 39, Number 1, January 2020
- António Canelas
, Ricardo Póvoa, Ricardo Martins, Nuno Lourenço, Jorge Guilherme, João Paulo Carvalho, Nuno Horta:
FUZYE: A Fuzzy c-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms. 1-13 - Xiaoxue Sun, Chenyang Kong, Yingyu Chen, Jun Tao, Zhangwen Tang:
A Synthesizable Constant Tuning Gain Technique for Wideband LC-VCO Design. 14-24 - Ahmad Shabani, Bijan Alizadeh:
PMTP: A MAX-SAT-Based Approach to Detect Hardware Trojan Using Propagation of Maximum Transition Probability. 25-33 - Zhipeng Guo, Ming Tang, Emmanuel Prouff, Maixing Luo, Fei Yan:
Table Recomputation-Based Higher-Order Masking Against Horizontal Attacks. 34-44 - Dmitry Utyamishev, Inna Partin-Vaisband:
Real-Time Detection of Power Analysis Attacks by Machine Learning of Power Supply Variations On-Chip. 45-55 - Bohun Seo, Hyeonggyu Kim, Soontae Kim:
Freezing: Eliminating Unnecessary Drawing Computation for Low Power. 56-61 - Yuncheng Guo, Yu Hua, Pengfei Zuo:
A Latency-Optimized and Energy-Efficient Write Scheme in NVM-Based Main Memory. 62-74 - Chen Li, Andrew Zigerelli, Jun Yang, Youtao Zhang, Sheng Ma, Yang Guo:
A Dynamic and Proactive GPU Preemption Mechanism Using Checkpointing. 75-87 - Yue Ma, Junlong Zhou, Thidapat Chantem, Robert P. Dick, Shige Wang, Xiaobo Sharon Hu:
Online Resource Management for Improving Reliability of Real-Time Systems on "Big-Little" Type MPSoCs. 88-100 - Santiago Pagani, Sai Manoj P. D., Axel Jantsch, Jörg Henkel:
Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey. 101-116 - Lei Deng, Yuan Xie, Ling Liang, Guanrui Wang, Liang Chang, Xing Hu, Xin Ma, Liu Liu, Jing Pei, Guoqi Li:
SemiMap: A Semi-Folded Convolution Mapping for Speed-Overhead Balance on Crossbars. 117-130 - Duo Liu, Xingni Li, Po-Chun Huang, Yi Gu, Yingjian Ling, Kan Zhong, Renping Liu, Xianzhang Chen, Liang Liang:
Downsizing Without Downgrading: Approximated Dynamic Time Warping on Nonvolatile Memories. 131-144 - Giuseppe Tagliavini, Andrea Marongiu, Luca Benini:
FlexFloat: A Software Library for Transprecision Computing. 145-156 - Jiayi Weng, Tsung-Yi Ho, Weiqing Ji, Peng Liu, Mengdi Bao, Hailong Yao:
URBER: Ultrafast Rule-Based Escape Routing Method for Large-Scale Sample Delivery Biochips. 157-170 - Jack Tang, Mohamed Ibrahim, Krishnendu Chakrabarty, Ramesh Karri:
Synthesis of Tamper-Resistant Pin-Constrained Digital Microfluidic Biochips. 171-184 - Zonghui Li, Hai Wan, Yangdong Deng, Xibin Zhao, Yue Gao, Xiaoyu Song, Ming Gu:
Time-Triggered Switch-Memory-Switch Architecture for Time-Sensitive Networking Switches. 185-198 - Song Chen, Jinglei Huang, Xiaodong Xu, Bo Ding, Qi Xu:
Integrated Optimization of Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems. 199-212 - Lucas Machado, Jordi Cortadella:
Support-Reducing Decomposition for FPGA Mapping. 213-224 - Alessandro Zanco, Stefano Grivet-Talocia, Tommaso Bradde, Marco De Stefano:
Enforcing Passivity of Parameterized LTI Macromodels via Hamiltonian-Driven Multivariate Adaptive Sampling. 225-238 - Liyang Lai, Kun-Han Tsai, Huawei Li:
GPGPU-Based ATPG System: Myth or Reality? 239-247 - Binod Kumar, Kanad Basu, Masahiro Fujita, Virendra Singh:
Post-Silicon Gate-Level Error Localization With Effective and Combined Trace Signal Selection. 248-261 - Irith Pomeranz:
Multicycle Broadside and Skewed-Load Tests for Test Compaction. 262-266 - Junyan Qian, Hao Ding, Hanpeng Xiao, Zhide Zhou, Lingzhong Zhao, Zhongyi Zhai:
Efficient Reconfiguration Algorithm With Flexible Rerouting Schemes for Constructing 3-D VLSI Subarrays. 267-271 - Siamack BeigMohammadi, Bijan Alizadeh:
Combinational Hybrid Signal Selection With Updated Reachability Lists for Post-Silicon Debug. 272-276 - Chuan Xu, Seshadri K. Kolluri, Kazuhiko Endo, Kaustav Banerjee:
Correction to "Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability". 277
Volume 39, Number 2, February 2020
- Umamaheswara Rao Tida, Cheng Zhuo, Leibo Liu, Yiyu Shi:
Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clocking. 281-293 - Ibtissem Seghaier, Mohamed H. Zaki, Sofiène Tahar:
Mating Sensitivity Analysis and Statistical Verification for Efficient Yield Estimation. 294-307 - Jae-Won Jang, Asmit De, Deepak Vontela, Ithihasa Reddy Nirmala, Swaroop Ghosh, Anirudh Iyengar:
Threshold-Defined Logic and Interconnect for Protection Against Reverse Engineering. 308-320 - Li-Pin Chang, Chia-Hsiang Cheng, Shu-Ting Chang, Po-Han Chou:
Current-Aware Flash Scheduling for Current Capping in Solid State Disks. 321-334 - Mingze Gao, Gang Qu:
Estimate and Recompute: A Novel Paradigm for Approximate Computing on Data Flow Graphs. 335-345 - Daniel Peroni, Mohsen Imani, Tajana Simunic Rosing:
Runtime Efficiency-Accuracy Tradeoff Using Configurable Floating Point Multiplier. 346-358 - Yasamin Moradi, Mohamed Ibrahim, Krishnendu Chakrabarty, Ulf Schlichtmann:
An Efficient Fault-Tolerant Valve-Based Microfluidic Routing Fabric for Droplet Barcoding in Single-Cell Analysis. 359-372 - Shuo-Han Chen, Tseng-Yi Chen, Yuan-Hao Chang, Hsin-Wen Wei, Wei-Kuan Shih:
A Partial Page Cache Strategy for NVRAM-Based Storage Devices. 373-386 - Andreas Grimmer, Werner Haselmayr, Robert Wille:
Automatic Droplet Sequence Generation for Microfluidic Networks With Passive Droplet Routing. 387-396 - Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino:
Logic Synthesis of Pass-Gate Logic Circuits With Emerging Ambipolar Technologies. 397-410 - Minghua Shen, Wentai Zhang, Guojie Luo, Nong Xiao:
Serial-Equivalent Static and Dynamic Parallel Routing for FPGAs. 411-423 - Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-Sun Seo:
Automatic Compilation of Diverse CNNs Onto High-Performance FPGA Accelerators. 424-437 - Tao Luo, Xuan Wang, Chuping Qu, Matthew Kay Fei Lee, Wai Teng Tang, Weng-Fai Wong, Rick Siow Mong Goh:
An FPGA-Based Hardware Emulator for Neuromorphic Chip With RRAM. 438-450 - Shigetaka Kumashiro, Tatsuya Kamei, Akira Hiroki, Kazutoshi Kobayashi:
An Efficient and Accurate Time Step Control Method for Power Device Transient Simulation Utilizing Dominant Time Constant Approximation. 451-463 - Panagiota Papavramidou, Michael Nicolaidis:
Iterative Diagnosis Approach for ECC-Based Memory Repair. 464-477 - Kwangsoo Han, Andrew B. Kahng, Jiajia Li:
Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution. 478-491 - Mehran Goli, Jannis Stoppe, Rolf Drechsler:
Automated Nonintrusive Analysis of Electronic System Level Designs. 492-505 - Yang Yu, Xu Fang, Xiyuan Peng:
A Post-Bond TSV Test Method Based on RGC Parameters Measurement. 506-519 - Mayler G. A. Martins, Samuel N. Pagliarini, Mehmet Meric Isgenc, Lawrence T. Pileggi:
From Virtual Characterization to Test-Chips: DFM Analysis Through Pattern Enumeration. 520-532 - Debjit Pal, Sai Ma, Shobha Vasudevan:
Emphasizing Functional Relevance Over State Restoration in Post-Silicon Signal Tracing. 533-546 - Jiali Luan, Zheng Zhang:
Prediction of Multidimensional Spatial Variation Data via Bayesian Tensor Completion. 547-551
Volume 39, Number 3, March 2020
- Mohammad Abdul Alim, Mayahsa M. Ali, Ali A. Rezazadeh, Christophe Gaquière:
Temperature Dependence of the Taylor Series Coefficients and Intermodulation Distortion Characteristics of GaN HEMT. 552-559 - Fábio Passos, Elisenda Roca, Javier J. Sieiro, Rafaella Fiorelli, Rafael Castro-López, José María López-Villegas, Francisco V. Fernández:
A Multilevel Bottom-Up Optimization Methodology for the Automated Synthesis of RF Systems. 560-571 - Farzad Samie, Vasileios Tsoutsouras, Dimosthenis Masouros, Lars Bauer, Dimitrios Soudris, Jörg Henkel:
Fast Operation Mode Selection for Highly Efficient IoT Edge Devices. 572-584 - Po-Hao Huang, Ya-Shu Chen, Jian-He Liao:
QT-Adaptation Engine: Adaptive QoS-Aware Scheduling and Governing in Thermally Constrained Mobile Devices. 585-598 - Yazhi Feng, Dan Feng, Wei Tong, Jingning Liu, Shuai Li:
Multiple Subpage Writing FTL in MLC by Exploiting Dual Mode Operations. 599-612 - Qin Wang, Ulf Schlichtmann, Yici Cai, Weiqing Ji, Zeyan Li, Haena Cheong, Oh-Sun Kwon, Hailong Yao, Tsung-Yi Ho, Kwanwoo Shin, Bing Li:
Integrated Control-Fluidic Codesign Methodology for Paper-Based Digital Microfluidic Biochips. 613-625 - Peng Yang, Zhehui Wang, Zhifei Wang, Jiang Xu, Yi-Shing Chang, Xuanqi Chen, Rafael K. V. Maeda, Jun Feng:
Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems. 626-639 - Zhifei Wang, Peng Yang, Yi-Shing Chang, Jiang Xu, Xuanqi Chen, Zhehui Wang, Jun Feng:
A Cross-Layer Optimization Framework for Integrated Optical Switches in Data Centers. 640-653 - Sanbao Su, Chen Zou, Weijiang Kong, Jie Han, Weikang Qian:
A Novel Heuristic Search Method for Two-Level Approximate Logic Synthesis. 654-669 - Sedigheh Kouhpayeh-Zadeh-Esfahani, Abdolali Abdipour, Kambiz Afrooz:
Fast Methodology for Time-Domain Analysis of Nonlinear-Loaded Transmission Line Excited by an Arbitrary Modulated Signal. 670-674 - Yen-Yu Su, Shuo-Hui Wang, Wei-Liang Wu, Mark Po-Hung Lin:
Corner-Stitching-Based Multilayer Obstacle-Avoiding Component-to-Component Rectilinear Minimum Spanning Tree Construction. 675-685 - Zuomin Zhu, Wei Zhang, Vivek Chaturvedi, Amit Kumar Singh:
Energy Minimization for Multicore Platforms Through DVFS and VR Phase Scaling With Comprehensive Convex Model. 686-699 - Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu:
Hierarchical Symbol-Based Health-Status Analysis Using Time-Series Data in a Core Router System. 700-713 - Ying Zhang, Krishnendu Chakrabarty, Zebo Peng, Ahmed Rezine, Huawei Li, Petru Eles, Jianhui Jiang:
Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors. 714-727 - Gabriel A. G. Andrade, Marleson Graf, Luiz C. V. dos Santos:
Chaining and Biasing: Test Generation Techniques for Shared-Memory Verification. 728-741 - Irith Pomeranz:
Reverse Low-Power Broadside Tests. 742-746 - Augusto Neutzling, Felipe S. Marranghello, Jody Maick Matos, André Inácio Reis, Renato P. Ribas:
maj-n Logic Synthesis for Emerging Technology. 747-751
Volume 39, Number 4, April 2020
- Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia:
SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations. 752-765 - Abhrajit Sengupta, Bodhisatwa Mazumdar, Muhammad Yasin, Ozgur Sinanoglu:
Logic Locking With Provable Security Against Power Analysis Attacks. 766-778 - Mohsen Ansari, Amir Yeganeh-Khaksar, Sepideh Safari, Alireza Ejlali:
Peak-Power-Aware Energy Management for Periodic Real-Time Applications. 779-788 - Xiaotao Jia, Jianlei Yang, Pengcheng Dai, Runze Liu, Yiran Chen, Weisheng Zhao:
SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing. 789-802 - Bi Wu, Pengcheng Dai, Yuanqing Cheng, Ying Wang, Jianlei Yang, Zhaohao Wang, Dijun Liu, Weisheng Zhao:
A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration. 803-815 - Sukanta Bhattacharjee, Robert Wille, Juinn-Dar Huang, Bhargab B. Bhattacharya:
Storage-Aware Algorithms for Dilution and Mixture Preparation With Flow-Based Lab-on-Chip. 816-829 - Dekui Wang, Zhenhua Duan, Cong Tian, Bohu Huang, Nan Zhang:
ParRA: A Shared Memory Parallel FPGA Router Using Hybrid Partitioning Approach. 830-842 - Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-Sun Seo:
Performance Modeling for CNN Inference Accelerators on FPGA. 843-856 - Yun Liang, Liqiang Lu, Qingcheng Xiao, Shengen Yan:
Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs. 857-870 - Winston Haaswijk, Mathias Soeken, Alan Mishchenko, Giovanni De Micheli:
SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism. 871-884 - Sheriff Sadiqbatcha, Zeyu Sun, Sheldon X.-D. Tan:
Accelerating Electromigration Aging: Fast Failure Detection for Nanometer ICs. 885-894 - Fulya Kaplan, Mostafa Said, Sherief Reda, Ayse K. Coskun:
LoCool: Fighting Hot Spots Locally for Improving System Energy Efficiency. 895-908 - Fei Wu, Meng Zhang, Yajuan Du, Weihua Liu, Zuo Lu, Jiguang Wan, Zhi-hu Tan, Changsheng Xie:
Using Error Modes Aware LDPC to Improve Decoding Performance of 3-D TLC NAND Flash. 909-921 - Neetu Jindal, Shubhani Gupta, Divya Praneetha Ravipati, Preeti Ranjan Panda, Smruti R. Sarangi:
Enhancing Network-on-Chip Performance by Reusing Trace Buffers. 922-935 - Irith Pomeranz:
Switching Activity of Faulty Circuits in Presence of Multiple Transition Faults. 936-945 - Ming Yang, Wenjian Yu:
Reliable Macromodel Generation for the Capacitance Extraction Based on Macromodel-Aware Random Walk Algorithm. 946-951
Volume 39, Number 5, May 2020
- Danil Sokolov, Victor Khomenko, Andrey Mokhov, Vladimir Dubikhin, David Lloyd, Alex Yakovlev:
Automating the Design of Asynchronous Logic Control for AMS Electronics. 952-965 - Ahcène Bounceur, Salvador Mir, Reinhardt Euler, Kamel Beznia:
Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate Extreme Value Model. 966-976 - Xuanqi Chen, Zhifei Wang, Yi-Shing Chang, Jiang Xu, Jun Feng, Peng Yang, Zhehui Wang, Luan H. K. Duong:
Modeling and Analysis of Optical Modulators Based on Free-Carrier Plasma Dispersion Effect. 977-990 - Qian Zhang, Qiang Xu:
ApproxIt: A Quality Management Framework of Approximate Computing for Iterative Methods. 991-1002 - Jack Tang, Mohamed Ibrahim, Krishnendu Chakrabarty, Ramesh Karri:
Analysis and Design of Tamper-Mitigating Microfluidic Routing Fabrics. 1003-1016 - Othon Tomoutzoglou, Dimitrios Mbakoyiannis, George Kornaros, Marcello Coppola:
Efficient Job Offloading in Heterogeneous Systems Through Hardware-Assisted Packet-Based Dispatching and User-Level Runtime Infrastructure. 1017-1030 - Dalin Li, Lan Huang, Teng Gao, Yang Feng, Adriano Tavares, Kangping Wang:
An Extended Nonstrict Partially Ordered Set-Based Configurable Linear Sorter on FPGAs. 1031-1044 - Jingwen Ding, Shigeru Yamashita:
Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D Architecture and Its Application to Large-Scale Circuits. 1045-1058 - Mohammad Reza Rohanipoor, Behnam Ghavami, Mohsen Raji:
Improving Combinational Circuit Reliability Against Multiple Event Transients via a Partition and Restructuring Approach. 1059-1072 - Sitansusekhar Roymohapatra, Ganesh R. Gore, Akanksha Yadav, Mahesh B. Patil, Krishnan S. Rengarajan, Subramanian S. Iyer, Maryam Shojaei Baghini:
A Novel Hierarchical Circuit LUT Model for SOI Technology for Rapid Prototyping. 1073-1083 - Chris Yakopcic, Tarek M. Taha, David J. Mountain, Thomas Salter, Matthew J. Marinella, Mark R. McLean:
Memristor Model Optimization Based on Parameter Extraction From Device Characterization Data. 1084-1095 - Guan-Qi Fang, Yong Zhong, Yi-Hao Cheng, Shao-Yun Fang:
Obstacle-Avoiding Open-Net Connector With Precise Shortest Distance Estimation. 1096-1108 - Prachi Joshi, S. S. Ravi, Qingyu Liu, Unmesh D. Bordoloi, Soheil Samii, Sandeep Kumar Shukla, Haibo Zeng:
Approaches for Assigning Offsets to Signals for Improving Frame Packing in CAN-FD. 1109-1122 - Shaahin Angizi, Zhezhi He, Amro Awad, Deliang Fan:
MRIMA: An MRAM-Based In-Memory Accelerator. 1123-1136 - Sameh El-Ashry, Mostafa Khamis, Hala Ibrahim, Ahmed Shalaby, Mohamed Abdelsalam, M. Watheq El-Kharashi:
On Error Injection for NoC Platforms: A UVM-Based Generic Verification Environment. 1137-1150
Volume 39, Number 6, June 2020
- Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim:
Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs. 1151-1164 - Sheng-En David Lin, Dae Hyun Kim:
Construction of All Rectilinear Steiner Minimum Trees on the Hanan Grid and Its Applications to VLSI Design. 1165-1176 - Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan Rakai, Ismail Bustany, Andrew A. Kennings, Laleh Behjat:
Eh?Predictor: A Deep Learning Framework to Identify Detailed Routing Short Violations From a Placed Netlist. 1177-1190 - Song Chen, Mengke Ge, Zhigang Li, Jinglei Huang, Qi Xu, Feng Wu:
Generalized Fault-Tolerance Topology Generation for Application-Specific Network-on-Chips. 1191-1204 - Daifeng Guo, Hongbo Zhang, Martin D. F. Wong:
On Coloring Rectangular and Diagonal Grid Graphs for Multipatterning and DSA Lithography. 1205-1216 - Gengjie Chen, Evangeline F. Y. Young:
SALT: Provably Good Routing Topology by a Novel Steiner Shallow-Light Tree Algorithm. 1217-1230 - Raphael Andreoni Camponogara Viera, Philippe Maurine, Jean-Max Dutertre, Rodrigo Possamai Bastos:
Simulation and Experimental Demonstration of the Importance of IR-Drops During Laser Fault Injection. 1231-1244 - Peishan Tu, Chak-Wa Pui, Evangeline F. Y. Young:
Simultaneous Reconnection Surgery Technique of Routing With Machine Learning-Based Acceleration. 1245-1257 - Brent J. Maundy, Ahmed S. Elwakil, Leonid Belostotski:
Automatic Generation of Differential-Input Differential-Output Second-Order Filters Based on a Differential Pair. 1258-1271 - Mohammad Hosseinabady, José Luis Núñez-Yáñez:
A Streaming Dataflow Engine for Sparse Matrix-Vector Multiplication Using High-Level Synthesis. 1272-1285 - Shuo-Han Chen, Che-Wei Tsao, Yuan-Hao Chang:
Beyond Address Mapping: A User-Oriented Multiregional Space Management Design for 3-D NAND Flash Memory. 1286-1299 - Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev, Nandakishore Santhi, Tobias Grosser, Rumen Andonov:
Optimization Approach to Accelerator Codesign. 1300-1313 - Xing Huang, Tsung-Yi Ho, Krishnendu Chakrabarty, Wenzhong Guo:
Timing-Driven Flow-Channel Network Construction for Continuous-Flow Microfluidic Biochips. 1314-1327 - Kyle Kuan, Tosiron Adegbija:
Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design. 1328-1339 - Yi-Cheng Kung, Kuen-Jong Lee, Sudhakar M. Reddy:
Generating Single- and Double-Pattern Tests for Multiple CMOS Fault Models in One ATPG Run. 1340-1345 - Maciej J. Ciesielski, Tiankai Su, Atif Yasin, Cunxi Yu:
Understanding Algebraic Rewriting for Arithmetic Circuit Verification: A Bit-Flow Model. 1346-1357
Volume 39, Number 7, July 2020
- Ebadollah Taheri, Mihailo Isakov, Ahmad Patooghy, Michel A. Kinsy:
Addressing a New Class of Reliability Threats in 3-D Network-on-Chips. 1358-1371 - Ye X. Ding, Florin Burcea, Husni M. Habal, Helmut E. Graeb:
PASTEL: Parasitic Matching-Driven Placement and Routing of Capacitor Arrays With Generalized Ratios in Charge-Redistribution SAR-ADCs. 1372-1385 - Zonghui Li, Hai Wan, Yangdong Deng, Xibin Zhao, Yue Gao, Xiaoyu Song, Ming Gu:
Model-Based Adaptation of Mixed-Criticality Multiservice Systems for Extreme Physical Environments. 1386-1399 - Hai Wang, Xingxing Guo, Sheldon X.-D. Tan, Chi Zhang, He Tang, Yuan Yuan:
Leakage-Aware Predictive Thermal Management for Multicore Systems Using Echo State Network. 1400-1413 - Yi Cai, Tianqi Tang, Lixue Xia, Boxun Li, Yu Wang, Huazhong Yang:
Low Bit-Width Convolutional Neural Network on RRAM. 1414-1427 - Jieru Zhao, Liang Feng, Sharad Sinha, Wei Zhang, Yun Liang, Bingsheng He:
Performance Modeling and Directives Optimization for High-Level Synthesis on FPGA. 1428-1441 - Junzhong Shen, You Huang, Mei Wen, Chunyuan Zhang:
Toward an Efficient Deep Pipelined Template-Based Architecture for Accelerating the Entire 2-D and 3-D CNNs on FPGA. 1442-1455 - Ankur Sharma, David G. Chinnery, Tiago Reimann, Sarvesh Bhardwaj, Chris Chu:
Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations. 1456-1469 - Yi Wu, Weikang Qian:
ALFANS: Multilevel Approximate Logic Synthesis Framework by Approximate Node Simplification. 1470-1483 - Mohammad Saber Golanbari, Saman Kiamehr, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori:
Selective Flip-Flop Optimization for Reliable Digital Circuit Design. 1484-1497 - Cheng Zhuo, Shaoheng Luo, Houle Gan, Jiang Hu, Zhiguo Shi:
Noise-Aware DVFS for Efficient Transitions on Battery-Powered IoT Devices. 1498-1510 - Ying Chen, Yibo Lin, Tianyang Gai, Yajuan Su, Yayi Wei, David Z. Pan:
Semisupervised Hotspot Detection With Self-Paced Multitask Learning. 1511-1523 - Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto:
Reducing Interpolant Circuit Size Through SAT-Based Weakening. 1524-1531 - Rongyang Liu, José G. Delgado-Frias, Doug Boyce, Yi Qian, Rahul Khanna:
Online Firmware Functional Validation Scheme Using Colored Petri Net Model. 1532-1545 - Atef Ibrahim:
Unified and Scalable Digit-Serial Systolic Array for Multiplication and Division Over GF (2m). 1546-1549
Volume 39, Number 8, August 2020
- Giovanni Agosta, Alessandro Barenghi, Gerardo Pelosi:
Compiler-Based Techniques to Secure Cryptographic Embedded Software Against Side-Channel Attacks. 1550-1554 - Onur Mutlu, Jeremie S. Kim:
RowHammer: A Retrospective. 1555-1571 - Emil Stefanov, Marten van Dijk, Elaine Shi, Christopher W. Fletcher, Ling Ren, Xiangyao Yu, Srinivas Devadas:
A Retrospective on Path ORAM. 1572-1576 - Mohamed El Massad, Siddharth Garg, Mahesh V. Tripunitara:
The SAT Attack on IC Camouflaging: Impact and Potential Countermeasures. 1577-1590 - Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja:
Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime. 1591-1606 - Kyle Juretus, Ioannis Savidis:
Characterization of In-Cone Logic Locking Resiliency Against the SAT Attack. 1607-1620 - Zhufei Chu, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli:
Advanced Functional Decomposition Using Majority and Its Applications. 1621-1634 - Andreas Voigt, Jörg Schreiter, Philipp Frank, Cesare Pini, Christian Mayr, Andreas Richter:
Method for the Computer-Aided Schematic Design and Simulation of Hydrogel-Based Microfluidic Systems. 1635-1648 - Chunfeng Cui, Zheng Zhang:
High-Dimensional Uncertainty Quantification of Electronic and Photonic IC With Non-Gaussian Correlated Process Variations. 1649-1661 - Wei-Chun Chang, Iris Hui-Ru Jiang:
iClaire: A Fast and General Layout Pattern Classification Algorithm With Clip Shifting and Centroid Recreation. 1662-1673 - Myoungsoo Jung, Wonil Choi, Miryeong Kwon, Shekhar Srikantaiah, Joonhyuk Yoo, Mahmut Taylan Kandemir:
Design of a Host Interface Logic for GC-Free SSDs. 1674-1687 - Gian Mayuga, Yasuo Sato, Michiko Inoue:
Highly Reliable Memory Architecture Using Adaptive Combination of Proactive Aging-Aware In-Field Self-Repair and ECC. 1688-1698 - Yingdi Liu, Nilanjan Mukherjee, Janusz Rajski, Sudhakar M. Reddy, Jerzy Tyszer:
Deterministic Stellar BIST for Automotive ICs. 1699-1710 - Debjit Pal, Spencer Offenberger, Shobha Vasudevan:
Assertion Ranking Using RTL Source Code Analysis. 1711-1724 - Syed Ali Asadullah Bukhari, Faiq Khalid, Osman Hasan, Muhammad Shafique, Jörg Henkel:
Toward Model Checking-Driven Fair Comparison of Dynamic Thermal Management Techniques Under Multithreaded Workloads. 1725-1738 - Irith Pomeranz:
Broadside Tests for Transition and Stuck-At Faults. 1739-1743 - Daeyeon Kim, SangGi Do, Sung-Yun Lee, Seokhyeong Kang:
Compact Topology-Aware Bus Routing for Design Regularity. 1744-1749
Volume 39, Number 9, September 2020
- Ing-Chao Lin, Da-Wei Chang, Wei-Jun Chen, Jian-Ting Ke, Po-Han Huang:
Global Clean Page First Replacement and Index-Aware Multistream Prefetcher in Hybrid Memory Architecture. 1750-1763 - Shengyuan Zhou, Qi Guo, Zidong Du, Dao-Fu Liu, Tianshi Chen, Ling Li, Shaoli Liu, Jinhong Zhou, Olivier Temam, Xiaobing Feng, Xuehai Zhou, Yunji Chen:
ParaML: A Polyvalent Multicore Accelerator for Machine Learning. 1764-1777 - Alessandro Barenghi, William Fornaciari, Gerardo Pelosi, Davide Zoni:
Scramble Suit: A Profile Differentiation Countermeasure to Prevent Template Attacks. 1778-1791 - Zhiyong Zhang, Zhaoyan Shen, Zhiping Jia, Zili Shao:
UniBuffer: Optimizing Journaling Overhead With Unified DRAM and NVM Hybrid Buffer Cache. 1792-1805 - Bing Wu, Dan Feng, Wei Tong, Jingning Liu, Chengning Wang, Wei Zhao, Yang Zhang:
A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches. 1806-1819 - Zhehui Wang, Zhifei Wang, Jiang Xu, Yi-Shing Chang, Jun Feng, Xuanqi Chen, Shixi Chen, Jiaxu Zhang:
CAMON: Low-Cost Silicon Photonic Chiplet for Manycore Processors. 1820-1833 - Suresh Durai, Srinivasan Raj, Anbarasu Manivannan:
Impact of Thermal Boundary Resistance on the Performance and Scaling of Phase-Change Memory Device. 1834-1840 - Weidong Cao, Xin He, Ayan Chakrabarti, Xuan Zhang:
NeuADC: Neural Network-Inspired Synthesizable Analog-to-Digital Conversion. 1841-1854 - Taehyun Kwon, Muhammad Imran, Joon-Sung Yang:
Pattern-Aware Encoding for MLC PCM Storage Density, Energy Efficiency, and Performance Enhancement. 1855-1865 - Zoha Pajouhi:
Ultralow Power Nonvolatile Logic Based on Spin-Orbit and Exchange Coupled Nanowires. 1866-1874 - Qi Nie, Sharad Malik:
MemFlow: Memory-Driven Data Scheduling With Datapath Co-Design in Accelerators for Large-Scale Inference Applications. 1875-1888 - Junki Park, Wooseok Yi, Daehyun Ahn, Jaeha Kung, Jae-Joon Kim:
Balancing Computation Loads and Optimizing Input Vector Loading in LSTM Accelerators. 1889-1901 - Gengjie Chen, Chak-Wa Pui, Haocheng Li, Evangeline F. Y. Young:
Dr. CU: Detailed Routing by Sparse Grid Graph and Minimum-Area-Captured Path Search. 1902-1915 - Rassul Bairamkulov, Kan Xu, Mikhail Popovich, Juan Ochoa, Vaishnav Srinivas, Eby G. Friedman:
Power Delivery Exploration Methodology Based on Constrained Optimization. 1916-1924 - Minho Cheong, Ingeol Lee, Sungho Kang:
A 3-D Rotation-Based Through-Silicon via Redundancy Architecture for Clustering Faults. 1925-1934 - Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu:
Self-Learning and Efficient Health-Status Analysis for a Core Router System. 1935-1948
Volume 39, Number 10, October 2020
- Abhishek Chakraborty, Nithyashankari Gummidipoondi Jayasankaran, Yuntao Liu, Jeyavijayan Rajendran, Ozgur Sinanoglu, Ankur Srivastava, Yang Xie, Muhammad Yasin, Michael Zuzak:
Keynote: A Disquisition on Logic Locking. 1952-1972 - Minxuan Zhou, Andreas Prodromou, Rui Wang, Hailong Yang, Depei Qian, Dean M. Tullsen:
Temperature-Aware DRAM Cache Management - Relaxing Thermal Constraints in 3-D Systems. 1973-1986 - Yangguang Cui, Kun Cao, Liying Li, Junlong Zhou, Tongquan Wei, Shiyan Hu:
Augmented Cross-Entropy-Based Joint Temperature Optimization of Real-Time 3-D MPSoC Systems. 1987-1999 - Hossein Eslahi, Sayed Ali Albahrani, Dhawal Mahajan, Sourabh Khandelwal:
An Analytical Model for Hot Carrier Induced Long-Term Degradation in Power Amplifiers. 2000-2005 - Sabyasachi Deyati, Barry J. Muldrey, Abhijit Chatterjee:
Dynamic Test Stimulus Adaptation for Analog/RF Circuits Using Booleanized Models Extracted From Hardware. 2006-2019 - John Vista, Ashish Ranjan:
High Frequency Meminductor Emulator Employing VDTA and its Application. 2020-2028 - Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Efficient Rare Failure Analysis Over Multiple Corners via Correlated Bayesian Inference. 2029-2041 - Federico Pittino, Roberto Diversi, Luca Benini, Andrea Bartolini:
Robust Identification of Thermal Models for In-Production High-Performance-Computing Clusters With Machine Learning-Based Data Selection. 2042-2054 - Xin Zheng, Chongyao Xu, Xianghong Hu, Yun Zhang, Xiaoming Xiong:
The Software/Hardware Co-Design and Implementation of SM2/3/4 Encryption/Decryption and Digital Signature System. 2055-2066 - Yu Liu, Chao Peng, Yecheng Zhao, Yangyang Li, Haibo Zeng:
Schedulability Analysis of Engine Control Systems With Dynamic Switching Speeds. 2067-2080 - Lei Bu, Qixin Wang, Xinyue Ren, Shaopeng Xing, Xuandong Li:
Scenario-Based Online Reachability Validation for CPS Fault Prediction. 2081-2094 - Kun Cao, Junlong Zhou, Guo Xu, Tongquan Wei, Shiyan Hu:
Exploring Renewable-Adaptive Computation Offloading for Hierarchical QoS Optimization in Fog Computing. 2095-2108 - Pierluigi Nuzzo, Nikunj Bajaj, Michael Masin, Dmitrii Kirov, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli:
Optimized Selection of Reliable and Cost-Effective Safety-Critical System Architectures. 2109-2123 - Lu Zhang, Dejun Mu, Wei Hu, Yu Tai, Jeremy Blackstone, Ryan Kastner:
Memory-Based High-Level Synthesis Optimizations Security Exploration on the Power Side-Channel. 2124-2137 - Junye Shi, Yang Lu, Jiliang Zhang:
Approximation Attacks on Strong PUFs. 2138-2151 - Huanyu Wang, Qihang Shi, Adib Nahiyan, Domenic Forte, Mark M. Tehranipoor:
A Physical Design Flow Against Front-Side Probing Attacks by Internal Shielding. 2152-2165 - Changhai Ou, Chengju Zhou, Siew-Kei Lam:
A First Study of Compressive Sensing for Side-Channel Leakage Sampling. 2166-2177 - Hsiao-Yu Chiang, Yung-Chih Chen, De-Xuan Ji, Xiang-Min Yang, Chia-Chun Lin, Chun-Yao Wang:
LOOPLock: Logic Optimization-Based Cyclic Logic Locking. 2178-2191 - Chaofei Yang, Beiye Liu, Hai Li, Yiran Chen, Mark Barnell, Qing Wu, Wujie Wen, Jeyavijayan Rajendran:
Thwarting Replication Attack Against Memristor-Based Neuromorphic Computing System. 2192-2205 - Basireddy Karunakar Reddy, Amit Kumar Singh, Bashir M. Al-Hashimi, Geoff V. Merrett:
AdaMD: Adaptive Mapping and DVFS for Energy-Efficient Heterogeneous Multicores. 2206-2217 - Yue Ma, Junlong Zhou, Thidapat Chantem, Robert P. Dick, Shige Wang, Xiaobo Sharon Hu:
Improving Reliability of Soft Real-Time Embedded Systems on Integrated CPU and GPU Platforms. 2218-2229 - Congming Gao, Liang Shi, Qiao Li, Kai Liu, Chun Jason Xue, Jun Yang, Youtao Zhang:
Aging Capacitor Supported Cache Management Scheme for Solid-State Drives. 2230-2239 - Won-Kyung Kang, Sungjoo Yoo:
$Q$ -Value Prediction for Reinforcement Learning Assisted Garbage Collection to Reduce Long Tail Latency in SSD. 2240-2253 - Siqi Wang, Gayathri Ananthanarayanan, Yifan Zeng, Neeraj Goel, Anuj Pathania, Tulika Mitra:
High-Throughput CNN Inference on Embedded ARM Big.LITTLE Multicore Processors. 2254-2267 - Mohsen Imani, Samuel Bosch, Sohum Datta, Sharadhi Ramakrishna, Sahand Salamat, Jan M. Rabaey, Tajana Rosing:
QuantHD: A Quantization Framework for Hyperdimensional Computing. 2268-2278 - Jingchen Zhu, Guangyu Sun, Xian Zhang, Chao Zhang, Weiqi Zhang, Yun Liang, Tao Wang, Yiran Chen, Jia Di:
Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses. 2279-2292 - Zimeng Zhou, Chenchen Fu, Chun Jason Xue, Song Han:
Energy-Constrained Data Freshness Optimization in Self-Powered Networked Embedded Systems. 2293-2306 - Shibarchi Majumder, Jens Frederik Dalsgaard Nielsen, Thomas Bak:
Ærø: A Platform Architecture for Mixed-Criticality Airborne Systems. 2307-2318 - Xu Jiang, Nan Guan, Xiang Long, Han Wan:
Decomposition-Based Real-Time Scheduling of Parallel Tasks on Multicores Platforms. 2319-2332 - Wei Zhang, Nan Guan, Lei Ju, Yue Tang, Weichen Liu, Zhiping Jia:
Scope-Aware Useful Cache Block Calculation for Cache-Related Pre-Emption Delay Analysis With Set-Associative Data Caches. 2333-2346 - Wen Wen, Lei Zhao, Youtao Zhang, Jun Yang:
Exploiting In-Memory Data Patterns for Performance Improvement on Crossbar Resistive Memory. 2347-2360 - Aayush Ankit, Timur Ibrayev, Abhronil Sengupta, Kaushik Roy:
TraNNsformer: Clustered Pruning on Crossbar-Based Architectures for Energy-Efficient Neural Networks. 2361-2374 - Abhoy Kole, Stefan Hillmich, Kamalika Datta, Robert Wille, Indranil Sengupta:
Improved Mapping of Quantum Circuits to IBM QX Architectures. 2375-2383 - Yaoyao Ye, Wenfei Zhang, Weichen Liu:
Thermal-Aware Design and Simulation Approach for Optical NoCs. 2384-2395 - Quan Deng, Youtao Zhang, Zhenyu Zhao, Shuzheng Zhang, Minxuan Zhang, Jun Yang:
FRF: Toward Warp-Scheduler Friendly STT-RAM/SRAM Fine-Grained Hybrid GPGPU Register File Design. 2396-2409 - Jiaqing Jiang, Xiaoming Sun, Yuan Sun, Kewen Wu, Zhiyu Xia:
Structured Decomposition for Reversible Boolean Functions. 2410-2421 - Mohsen Imani, Xunzhao Yin, John Messerly, Saransh Gupta, Michael T. Niemier, Xiaobo Sharon Hu, Tajana Rosing:
SearcHD: A Memory-Centric Hyperdimensional Computing With Stochastic Training. 2422-2433 - Rotem Ben Hur, Ronny Ronen, Ameer Haj Ali, Debjyoti Bhattacharjee, Adi Eliahu, Natan Peled, Shahar Kvatinsky:
SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput. 2434-2447 - Baogang Zhang, Necati Uysal, Deliang Fan, Rickard Ewetz:
Handling Stuck-at-Fault Defects Using Matrix Transformation for Robust Inference of DNNs. 2448-2460 - Qi Yu, Bruce R. Childers, Libo Huang, Cheng Qian, Zhiying Wang:
HPE: Hierarchical Page Eviction Policy for Unified Memory in GPUs. 2461-2474 - Tung-Liang Lin, Sao-Jie Chen:
A Platform of Resynthesizing a Clock Architecture Into Power-and-Area Effective Clock Trees. 2475-2488 - Ying Zhu, Xing Huang, Bing Li, Tsung-Yi Ho, Qin Wang, Hailong Yao, Robert Wille, Ulf Schlichtmann:
Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic Biochips. 2489-2502 - Swagath Venkataramani, Vivek Joy Kozhikkottu, Amit Sabne, Kaushik Roy, Anand Raghunathan:
Logic Synthesis of Approximate Circuits. 2503-2515 - Dan Feng, Jie Xu, Yu Hua, Wei Tong, Jingning Liu, Chunyan Li, Yiran Chen:
A Low-Overhead Encoding Scheme to Extend the Lifetime of Nonvolatile Memories. 2516-2529 - Chunfeng Liu, Bing Li, Bhargab B. Bhattacharya, Krishnendu Chakrabarty, Tsung-Yi Ho, Ulf Schlichtmann:
Test Generation for Flow-Based Microfluidic Biochips With General Architectures. 2530-2543 - Weiqing Ji, Tsung-Yi Ho, Junchao Wang, Hailong Yao:
Microfluidic Design for Concentration Gradient Generation Using Artificial Neural Network. 2544-2557 - Omid Akbari, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram, Muhammad Shafique:
X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture. 2558-2571 - Ryutaro Doi, Jaehoon Yu, Masanori Hashimoto:
Sneak Path Free Reconfiguration With Minimized Programming Steps for Via-Switch Crossbar-Based FPGA. 2572-2587 - Minghua Shen, Hongzheng Chen, Nong Xiao:
Entropy-Directed Scheduling for FPGA High-Level Synthesis. 2588-2601 - Shathanaa Rajmohan, N. Ramasubramanian, Nagi Naganathan:
Hybrid Evolutionary Design Space Exploration Algorithm With Defence Against Third Party IP Vulnerabilities. 2602-2614 - Shuangnan Liu, Francis C. M. Lau, Benjamin Carrión Schäfer:
Predictive Compositional Method to Design and Reoptimize Complex Behavioral Dataflows. 2615-2627 - Benjamin Carrión Schäfer, Zi Wang:
High-Level Synthesis Design Space Exploration: Past, Present, and Future. 2628-2639 - Yaping Li, Yong Wang, Yusong Li, Ranran Zhou, Zhaojun Lin:
An Artificial Neural Network Assisted Optimization System for Analog Design Space Exploration. 2640-2653 - Hang Lu, Mingzhe Zhang, Yinhe Han, Qi Wang, Huawei Li, Xiaowei Li:
Architecting Effectual Computation for Machine Learning Accelerators. 2654-2667 - Yu Xing, Shuang Liang, Lingzhi Sui, Xijie Jia, Jiantao Qiu, Xin Liu, Yushun Wang, Yi Shan, Yu Wang:
DNNVM: End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-Based CNN Accelerators. 2668-2681 - Tung-Che Liang, Yun-Sheng Chan, Tsung-Yi Ho, Krishnendu Chakrabarty, Chen-Yi Lee:
Multitarget Sample Preparation Using MEDA Biochips. 2682-2695 - Gerold Fink, Andreas Grimmer, Medina Hamidovic, Werner Haselmayr, Robert Wille:
Robustness Analysis for Droplet-Based Microfluidic Networks. 2696-2707 - Lingxuan Shao, Wentai Li, Tsung-Yi Ho, Sudip Roy, Hailong Yao:
Lookup Table-Based Fast Reliability-Aware Sample Preparation Using Digital Microfluidic Biochips. 2708-2721 - Mohammed Al-daloo, Ahmed Soltan, Alex Yakovlev:
Advance Interconnect Circuit Modeling Design Using Fractional-Order Elements. 2722-2734 - Xinyuan Wang, Pengwen Chen, Chung-Kuan Cheng:
Stability and Convergency Exploration of Matrix Exponential Integration on Power Delivery Network Transient Simulation. 2735-2748 - Yuri Ardesi, Ruiyu Wang, Giovanna Turvani, Gianluca Piccinini, Mariagrazia Graziano:
SCERPA: A Self-Consistent Algorithm for the Evaluation of the Information Propagation in Molecular Field-Coupled Nanocomputing. 2749-2760 - Min Su Kim, Yong Wook Kim, Tae Hee Han:
System-Level Signal Analysis Methodology for Optical Network-on-Chip Using Linear Model-Based Characterization. 2761-2771 - Dennis D. Weller, Michael Hefenbrock, Mohammad Saber Golanbari, Michael Beigl, Jasmin Aghassi-Hagmann, Mehdi B. Tahoori:
Bayesian Optimized Mixture Importance Sampling for High-Sigma Failure Rate Estimation. 2772-2783 - Matthias Függer, Robert Najvirt, Thomas Nowak, Ulrich Schmid:
A Faithful Binary Circuit Model. 2784-2797 - Changqing Xu, Yi Liu, Yintang Yang:
SRNoC: An Ultra-Fast Configurable FPGA-Based NoC Simulator Using Switch-Router Architecture. 2798-2811 - Geoffrey J. Coram, Colin C. McAndrew, Kiran K. Gullapalli, Kenneth S. Kundert:
Flicker Noise Formulations in Compact Models. 2812-2821 - Haoyu Yang, Shuhe Li, Zihao Deng, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young:
GAN-OPC: Mask Optimization With Lithography-Guided Generative Adversarial Nets. 2822-2834 - Dimitrios Mangiras, Apostolos Stefanidis, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos:
Timing-Driven Placement Optimization Facilitated by Timing-Compatibility Flip-Flop Clustering. 2835-2848 - Hao Geng, Wei Zhong, Haoyu Yang, Yuzhe Ma, Joydeep Mitra, Bei Yu:
SRAF Insertion via Supervised Dictionary Learning. 2849-2859 - Hamed Fatemi, Andrew B. Kahng, Hyein Lee, José Pineda de Gyvez:
Heuristic Methods for Fine-Grain Exploitation of FDSOI. 2860-2871 - Pascal Van Cleeff, Stefan Hougardy, Jannik Silvanus, Tobias Werner:
BonnCell: Automatic Cell Layout in the 7-nm Era. 2872-2885 - Or Maltabashi, Yehuda Kra, Adam Teman:
Physically Aware Affinity-Driven Multiplier Implementation. 2886-2897 - Tae-Hee You, Sangwoo Han, Young Min Park, Hyuk-Jun Lee, Eui-Young Chung:
Multitoken-Based Power Management for NAND Flash Storage Devices. 2898-2910 - Chengjin Tian, Yongkun Li, Si Wu, Jinzhong Chen, Liu Yuan, Yinlong Xu:
Popularity-Based Online Scaling for RAID Systems Under General Settings. 2911-2924 - Mingxi Cheng, Ji Li, Paul Bogdan, Shahin Nazarian:
H₂O-Cloud: A Resource and Quality of Service-Aware Task Scheduling Framework for Warehouse-Scale Data Centers. 2925-2937 - Tianming Ni, Yao Yao, Hao Chang, Lin Lu, Huaguo Liang, Aibin Yan, Zhengfeng Huang, Xiaoqing Wen:
LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults. 2938-2951 - Michele Portolan:
Automated Testing Flow: The Present and the Future. 2952-2963 - Yu Huang, Sylwester Milewski, Janusz Rajski, Jerzy Tyszer, Chen Wang:
Low Cost Hypercompression of Test Data. 2964-2975 - Mohammad Ebrahimi, Zainalabedin Navabi:
Selecting Representative Critical Paths for Sensor Placement Provides Early FPGA Aging Information. 2976-2989 - Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita:
An Automatic Test Pattern Generation Method for Multiple Stuck-At Faults by Incrementally Extending the Test Patterns. 2990-2999 - Liting Yu, Jianguo Ren, Xian Lu, Xiaoxiao Wang:
NBTI and HCI Aging Prediction and Reliability Screening During Production Test. 3000-3011 - Irith Pomeranz:
Globally Functional Transparent-Scan Sequences. 3012-3022 - Young-Woo Lee, Hyeonchan Lim, Youngkwang Lee, Sungho Kang:
Robust Secure Shield Architecture for Detection and Protection Against Invasive Attacks. 3023-3034 - Irith Pomeranz:
New Targets for Diagnostic Test Generation. 3035-3043 - Mason Chern, Shih-Wei Lee, Shi-Yu Huang, Yu Huang, Gaurav Veda, Kun-Han Tsai, Wu-Tung Cheng:
Diagnosis of Intermittent Scan Chain Faults Through a Multistage Neural Network Reasoning Process. 3044-3055 - Abhishek Koneru, Krishnendu Chakrabarty:
An Interlayer Interconnect BIST and Diagnosis Solution for Monolithic 3-D ICs. 3056-3066 - Benjamin Viale, Bruno Allard:
Scalable and Versatile Design Guidance Tool for the ESD Robustness of Integrated Circuits - Part I. 3067-3080 - Vinicius N. Possani, Alan Mishchenko, Renato P. Ribas, André Inácio Reis:
Parallel Combinational Equivalence Checking. 3081-3092 - Tobias Ludwig, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz:
Properties First - Correct-By-Construction RTL Design in System-Level Design Flows. 3093-3106 - Benjamin Viale, Bruno Allard:
Scalable and Versatile Design Guidance Tool for the ESD Robustness of Integrated Circuits - Part II. 3107-3117 - Weiqiang Liu, Ziying Ni, Jian Ni, Ciara Rafferty, Máire O'Neill:
High Performance Modular Multiplication for SIDH. 3118-3122 - Jianing Deng, Zhiguo Shi, Cheng Zhuo:
Energy-Efficient Real-Time UAV Object Detection on Embedded Platforms. 3123-3127 - Wei-Che Wang, Yizhang Wu, Puneet Gupta:
Reverse Engineering for 2.5-D Split Manufactured ICs. 3128-3133 - Rajit Manohar:
Exact Timing Analysis for Asynchronous Circuits With Multiple Periods. 3134-3138 - Irith Pomeranz:
Functional Broadside Tests Under Broadcast Scan. 3139-3143 - Zhengqi Gao, Jun Tao, Dian Zhou, Xuan Zeng:
Efficient Parametric Yield Estimation Over Multiple Process Corners via Bayesian Inference Based on Bernoulli Distribution. 3144-3148
Volume 39, Number 11, November 2020
- Mark Sagi, Nguyen Anh Vu Doan, Martin Rapp, Thomas Wild, Jörg Henkel, Andreas Herkersdorf:
A Lightweight Nonlinear Methodology to Accurately Model Multicore Processor Power. 3152-3164 - Jinfeng Li, Liwei Chen, Gang Shi, Kai Chen, Dan Meng:
ABCFI: Fast and Lightweight Fine-Grained Hardware-Assisted Control-Flow Integrity. 3165-3176 - Yibo Wu, Leibo Liu, Liang Wang, Xiaohang Wang, Jie Han, Chenchen Deng, Shaojun Wei:
Aggressive Fine-Grained Power Gating of NoC Buffers. 3177-3189 - Taha Belkhouja, Janardhan Rao Doppa:
Analyzing Deep Learning for Time-Series Data Through Adversarial Lens in Mobile and IoT Applications. 3190-3201 - M. Akif Özkan, Arsène Pérard-Gayot, Richard Membarth, Philipp Slusallek, Roland Leißa, Sebastian Hack, Jürgen Teich, Frank Hannig:
AnyHLS: High-Level Synthesis With Partial Evaluation. 3202-3214 - Rupak Majumdar, Kaushik Mallik, Anne-Kathrin Schmuck, Damien Zufferey:
Assume-Guarantee Distributed Synthesis. 3215-3226 - Marcus Pirron, Damien Zufferey, Phillip Stanley-Marbell:
Automated Controller and Sensor Configuration Synthesis Using Dimensional Analysis. 3227-3238 - Yongwoo Lee, Jaehyun Park, Junhee Ryu, Younghyun Kim:
AxFTL: Exploiting Error Tolerance for Extending Lifetime of NAND Flash Storage. 3239-3249 - Elbruz Ozen, Alex Orailoglu:
Boosting Bit-Error Resilience of DNN Accelerators Through Median Feature Selection. 3250-3262 - Chao Wu, Qiao Li, Cheng Ji, Tei-Wei Kuo, Chun Jason Xue:
Boosting User Experience via Foreground-Aware Cache Management in UFS Mobile Devices. 3263-3275 - Jiachen Wang, Xiaohang Wang, Yingtao Jiang, Amit Kumar Singh, Letian Huang, Mei Yang:
Combating Enhanced Thermal Covert Channel in Multi-/Many-Core Systems With Channel-Aware Jamming. 3276-3287 - Ivan Ruchkin, Oleg Sokolsky, James Weimer, Tushar Hedaoo, Insup Lee:
Compositional Probabilistic Analysis of Temporal Properties Over Stochastic Detectors. 3288-3299 - Mahesh Balasubramanian, Aviral Shrivastava:
CRIMSON: Compute-Intensive Loop Acceleration by Randomized Iterative Modulo Scheduling and Optimized Mapping on CGRAs. 3300-3310 - Gaddisa Olani Ganfure, Chun-Feng Wu, Yuan-Hao Chang, Wei-Kuan Shih:
DeepPrefetcher: A Deep Learning Framework for Data Prefetching in Flash Storage Devices. 3311-3322 - Chao Huang, Jiameng Fan, Xin Chen, Wenchao Li, Qi Zhu:
Divide and Slide: Layer-Wise Refinement for Output Range Analysis of Deep Neural Networks. 3323-3335 - Jing Huang, Renfa Li, Xun Jiao, Yu Jiang, Wanli Chang:
Dynamic DAG Scheduling on Multiprocessor Systems: Reliability, Energy, and Makespan. 3336-3347 - Homa Aghilinasab, Waqar Ali, Heechul Yun, Rodolfo Pellizzoni:
Dynamic Memory Bandwidth Allocation for Real-Time GPU-Based SoC Platforms. 3348-3360 - Sami Salamin, Martin Rapp, Jörg Henkel, Andreas Gerstlauer, Hussam Amrouch:
Dynamic Power and Energy Management for NCFET-Based Processors. 3361-3372 - Renato Cordeiro, Dhruv Gajaria, Ankur Limaye, Tosiron Adegbija, Nima Karimian, Fatemeh Tehranipoor:
ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture. 3373-3384 - Jinghao Sun, Rongxiao Shi, Kexuan Wang, Nan Guan, Zhishan Guo:
Efficient Feasibility Analysis for Graph-Based Real-Time Task Systems. 3385-3397 - Jinfeng Li, Qizhen Xu, Yongyue Li, Liwei Chen, Gang Shi, Dan Meng:
Efficient Return Address Verification Based on Dislocated Stack. 3398-3407 - Shixuan Zheng, Xianjue Zhang, Daoli Ou, Shibin Tang, Leibo Liu, Shaojun Wei, Shouyi Yin:
Efficient Scheduling of Irregular Network Structures on CNN Accelerators. 3408-3419 - Jian Gao, Yiwen Xu, Yu Jiang, Zhe Liu, Wanli Chang, Xun Jiao, Jiaguang Sun:
EM-Fuzz: Augmented Firmware Fuzzing via Memory Checking. 3420-3432 - Zhendong Wang, Zihang Jiang, Zhen Wang, Xulong Tang, Cong Liu, Shouyi Yin, Yang Hu:
Enabling Latency-Aware Data Initialization for Integrated CPU/GPU Heterogeneous Platform. 3433-3444 - Yawen Wu, Zhepeng Wang, Yiyu Shi, Jingtong Hu:
Enabling On-Device CNN Training by Self-Supervised Instance Filtering and Error Map Pruning. 3445-3457 - H. Seckin Demir, Jennifer Blain Christen, Sule Ozev:
Energy-Efficient Image Recognition System for Marine Life. 3458-3466 - Kong-Kiat Yong, Li-Pin Chang:
Error Diluting: Exploiting 3-D nand Flash Process Variation for Efficient Read on LDPC-Based SSDs. 3467-3478 - Chih-Kai Kang, Hashan Roshantha Mendis, Chun-Han Lin, Ming-Syan Chen, Pi-Cheng Hsiu:
Everything Leaves Footprints: Hardware Accelerated Intermittent Deep Inference. 3479-3491 - Gregor Peach, Runyu Pan, Zhuoyi Wu, Gabriel Parmer, Christopher Haster, Ludmila Cherkasova:
eWASM: Practical Software Fault Isolation for Reliable Embedded Devices. 3492-3505 - Yehan Ma, Chenyang Lu, Bruno Sinopoli, Shen Zeng:
Exploring Edge Computing for Multitier Industrial Control. 3506-3518 - Virinchi Roy Surabhi, Prashanth Krishnamurthy, Hussam Amrouch, Jörg Henkel, Ramesh Karri, Farshad Khorrami:
Exposing Hardware Trojans in Embedded Platforms via Short-Term Aging. 3519-3530 - Tung-Che Liang, Zhanwei Zhong, Miroslav Pajic, Krishnendu Chakrabarty:
Extending the Lifetime of MEDA Biochips by Selective Sensing on Microelectrodes. 3531-3543 - Martin Kristien, Tom Spink, Brian Campbell, Susmit Sarkar, Ian Stark, Björn Franke, Igor Böhm, Nigel P. Topham:
Fast and Correct Load-Link/Store-Conditional Instruction Handling in DBT Systems. 3544-3554 - Feng Yu, Raj Gautam Dutta, Teng Zhang, Yaodan Hu, Yier Jin:
Fast Attack-Resilient Distributed State Estimator for Cyber-Physical Systems. 3555-3565 - Jack Miskelly, Máire O'Neill:
Fast DRAM PUFs on Commodity Devices. 3566-3576 - Vikkitharan Gnanasambandapillai, Jorgen Peddersen, Roshan G. Ragel, Sri Parameswaran:
FINDER: Find Efficient Parallel Instructions for ASIPs to Improve Performance of Large Applications. 3577-3588 - Fanrong Li, Gang Li, Zitao Mo, Xiangyu He, Jian Cheng:
FSA: A Fine-Grained Systolic Accelerator for Sparse CNNs. 3589-3600 - Rachmad Vidya Wicaksana Putra, Muhammad Shafique:
FSpiNN: An Optimization Framework for Memory-Efficient and Energy-Efficient Spiking Neural Networks. 3601-3613 - Guangli Li, Xiu Ma, Xueying Wang, Lei Liu, Jingling Xue, Xiaobing Feng:
Fusion-Catalyzed Pruning for Optimizing Deep Learning on Intelligent Edge Devices. 3614-3626 - Fei Wen, Mian Qin, Paul V. Gratz, A. L. Narasimha Reddy:
Hardware Memory Management for Future Mobile Hybrid Memory Systems. 3627-3637 - Quintin Fettes, Avinash Karanth, Razvan C. Bunescu, Ahmed Louri, Kyle Shiflett:
Hardware-Level Thread Migration to Reduce On-Chip Data Movement Via Reinforcement Learning. 3638-3649 - Yilian Ribot González, Geoffrey Nelissen:
HopliteRT*: Real-Time NoC for FPGA. 3650-3661 - Sergi Vilardell, Isabel Serra, Roberto Santalla, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
HRM: Merging Hardware Event Monitors for Improved Timing Analysis of Complex MPSoCs. 3662-3673 - Zhenya Zhang, Paolo Arcaini, Ichiro Hasuo:
Hybrid System Falsification Under (In)equality Constraints via Search Space Transformation. 3674-3685 - Jiwon Kim, Sungwoo Baek, Yonghun Choi, Junick Ahn, Hojung Cha:
Hydrone: Reconfigurable Energy Storage for UAV Applications. 3686-3697 - Vipin Kumar Kukkala, Sooryaa Vignesh Thiruloga, Sudeep Pasricha:
INDRA: Intrusion Detection Using Recurrent Autoencoders in Automotive Embedded Systems. 3698-3710 - Songran Liu, Wei Zhang, Mingsong Lv, Qiulin Chen, Nan Guan:
LATICS: A Low-Overhead Adaptive Task-Based Intermittent Computing System. 3711-3723 - Yuechen Chen, Ahmed Louri:
Learning-Based Quality Management for Approximate Communication in Network-on-Chips. 3724-3735 - Lorenzo Ferretti, Jihye Kwon, Giovanni Ansaloni, Giuseppe Di Guglielmo, Luca P. Carloni, Laura Pozzi:
Leveraging Prior Knowledge for Effective Design-Space Exploration in High-Level Synthesis. 3736-3747 - Faiq Khalid, Syed Rafay Hasan, Sara Zia, Osman Hasan, Falah Awwad, Muhammad Shafique:
MacLeR: Machine Learning-Based Runtime Hardware Trojan Detection in Resource-Constrained IoT Edge Devices. 3748-3761 - Gregory Stock, Juan A. Fraire, Tobias Mömke, Holger Hermanns, Fakhri Babayev, Eduardo Cruz:
Managing Fleets of LEO Satellites: Nonlinear, Optimal, Efficient, Scalable, Usable, and Robust. 3762-3773 - Nicolas Belleville, Damien Couroussé, Karine Heydemann, Quentin L. Meunier, Inès Ben El Ouahma:
Maskara: Compilation of a Masking Countermeasure With Optimized Polynomial Interpolation. 3774-3786 - Haitong Wang, Neil C. Audsley, Xiaobo Sharon Hu, Wanli Chang:
Meshed Bluetree: Time-Predictable Multimemory Interconnect for Multicore Architectures. 3787-3798 - Md Jubaer Hossain Pantho, Christophe Bobda:
MeXT-SE: A Design Tool to Transparently Generate Secure MPSoC. 3799-3808 - Ezio Bartocci, Jyotirmoy Deshmukh, Felix Gigler, Cristinel Mateis, Dejan Nickovic, Xin Qin:
Mining Shape Expressions From Positive Examples. 3809-3820 - Elisabetta De Giovanni, Fabio Montagna, Benoît W. Denkinger, Simone Machetti, Miguel Peón Quirós, Simone Benatti, Davide Rossi, Luca Benini, David Atienza:
Modular Design and Optimization of Biomedical Applications for Ultralow Power Heterogeneous Platforms. 3821-3832 - Amir Hosein Afandizadeh Zargari, Manik Dautta, Marzieh Ashrafiamiri, Minjun Seo, Peter Tseng, Fadi J. Kurdahi:
NEWERTRACK: ML-Based Accurate Tracking of In-Mouth Nutrient Sensors Position Using Spectrum-Wide Information. 3833-3841 - Hussam Amrouch, Georgios Zervakis, Sami Salamin, Hammam Kattan, Iraklis Anagnostopoulos, Jörg Henkel:
NPU Thermal Management. 3842-3855 - Yao-Wen Kang, Chun-Feng Wu, Yuan-Hao Chang, Tei-Wei Kuo, Shu-Yin Ho:
On Minimizing Analog Variation Errors to Resolve the Scalability Issue of ReRAM-Based Crossbar Accelerators. 3856-3867 - Konstantinos Mamouras, Zhifu Wang:
Online Signal Monitoring With Bounded Lag. 3868-3880 - S. R. Swamy Saranam Chongala, Sumitha George, Hariram Thirucherai Govindarajan, Jagadish Kotra, Madhu Mutyam, John Sampson, Mahmut T. Kandemir, Vijaykrishnan Narayanan:
Optimization of Intercache Traffic Entanglement in Tagless Caches With Tiling Opportunities. 3881-3892 - Seunghyeok Jeon, Jiwon Kim, Junick Ahn, Hojung Cha:
Optimizing Discharge Efficiency of Reconfigurable Battery With Deep Reinforcement Learning. 3893-3905 - Ashikahmed Bhuiyan, Federico Reghenzani, William Fornaciari, Zhishan Guo:
Optimizing Energy in Non-Preemptive Mixed-Criticality Scheduling by Exploiting Probabilistic Information. 3906-3917 - Xiaofan Yu, Kazim Ergun, Ludmila Cherkasova, Tajana Simunic Rosing:
Optimizing Sensor Deployment and Maintenance Costs for Large-Scale Environmental Monitoring. 3918-3930 - Jiwon Kim, Yonghun Choi, Seunghyeok Jeon, Jaeyun Kang, Hojung Cha:
Optrone: Maximizing Performance and Energy Resources of Drone Batteries. 3931-3943 - Bai Xue, Miaomiao Zhang, Arvind Easwaran, Qin Li:
PAC Model Checking of Black-Box Continuous-Time Dynamical Systems. 3944-3955 - Jun Li, Zhibing Sha, Zhigang Cai, François Trahay, Jianwei Liao:
Patch-Based Data Management for Dual-Copy Buffers in RAID-Enabled SSDs. 3956-3967 - Asif Ali Khan, Hauke Mewes, Tobias Grosser, Torsten Hoefler, Jerónimo Castrillón:
Polyhedral Compilation for Racetrack Memories. 3968-3980 - Andreas Pavlogiannis, Nico Schaumberger, Ulrich Schmid, Krishnendu Chatterjee:
Precedence-Aware Automated Competitive Analysis of Real-Time Scheduling. 3981-3992 - Chao Wu, Yufei Cui, Cheng Ji, Tei-Wei Kuo, Chun Jason Xue:
Pruning Deep Reinforcement Learning for Dual User Experience and Storage Lifetime Improvement on Mobile Devices. 3993-4005 - Ming Hu, Wenxue Duan, Min Zhang, Tongquan Wei, Mingsong Chen:
Quantitative Timing Analysis for Cyber-Physical Systems Using Uncertainty-Aware Scenario-Based Specifications. 4006-4017 - Sergiy Bogomolov, Marcelo Forets, Goran Frehse, Kostiantyn Potomkin, Christian Schilling:
Reachability Analysis of Linear Hybrid Systems via Block Decomposition. 4018-4029 - Huize Li, Hai Jin, Long Zheng, Xiaofei Liao:
ReSQM: Accelerating Database Operations Using ReRAM-Based Content Addressable Memory. 4030-4041 - Yachen Kong, Meng Zhang, Xuepeng Zhan, Rui Cao, Jiezhi Chen:
Retention Correlated Read Disturb Errors in 3-D Charge Trap NAND Flash Memory: Observations, Analysis, and Solutions. 4042-4051 - Isaías B. Felzmann, João Fabrício Filho, Lucas Francisco Wanner:
Risk-5: Controlled Approximations for RISC-V. 4052-4063 - Anish Krishnakumar, Samet E. Arda, A. Alper Goksoy, Sumit K. Mandal, Ümit Y. Ogras, Anderson L. Sartor, Radu Marculescu:
Runtime Task Scheduling Using Imitation Learning for Heterogeneous Many-Core Systems. 4064-4077 - Orlando Arias, Dean Sullivan, Haoqi Shan, Yier Jin:
SaeCAS: Secure Authenticated Execution Using CAM-Based Vector Storage. 4078-4089 - Bai Xue, Martin Fränzle, Naijun Zhan, Sergiy Bogomolov, Bican Xia:
Safety Verification for Random Ordinary Differential Equations. 4090-4101 - Changlong Li, Liang Shi, Yu Liang, Chun Jason Xue:
SEAL: User Experience-Aware Two-Level Swap for Mobile Devices. 4102-4114 - Yun-Shan Hsieh, Po-Chun Huang, Ping-Xiang Chen, Yuan-Hao Chang, Wang Kang, Ming-Chang Yang, Wei-Kuan Shih:
Shift-Limited Sort: Optimizing Sorting Performance on Skyrmion Memory-Based Systems. 4115-4128 - Sarada Krithivasan, Sanchari Sen, Anand Raghunathan:
Sparsity Turns Adversarial: Energy and Latency Attacks on Deep Neural Networks. 4129-4141 - Nikhil Kumar Singh, Indranil Saha:
Specification-Guided Automated Debugging of CPS Models. 4142-4153 - Weiwen Jiang, Lei Yang, Sakyasingha Dasgupta, Jingtong Hu, Yiyu Shi:
Standing on the Shoulders of Giants: Hardware and Neural Architecture Co-Search With Hot Start. 4154-4165 - Christoph W. Kessler, Sebastian Litzinger, Jörg Keller:
Static Scheduling of Moldable Streaming Tasks With Task Fusion for Parallel Systems With DVFS. 4166-4178 - Gang Chen, Yehua Ling, Tao He, Haitao Meng, Shengyu He, Yu Zhang, Kai Huang:
StereoEngine: An FPGA-Based Accelerator for Real-Time High-Quality Stereo Estimation With Binary Neural Network. 4179-4190 - Hazoor Ahmad, Tabasher Arif, Muhammad Abdullah Hanif, Rehan Hafiz, Muhammad Shafique:
SuperSlash: A Unified Design Space Exploration and Model Compression Methodology for Design of Deep Learning Accelerators With Reduced Off-Chip Memory Access Volume. 4191-4204 - Mario Günzel, Georg von der Brüggen, Jian-Jia Chen:
Suspension-Aware Earliest-Deadline-First Scheduling Analysis. 4205-4216 - Marco Siracusa, Fabrizio Ferrandi:
Tensor Optimization for High-Level Synthesis Design Flows. 4217-4228 - Steven Derrien, Thibaut Marty, Simon Rokicki, Tomofumi Yuki:
Toward Speculative Loop Pipelining for High-Level Synthesis. 4229-4239 - Paul Palomero Bernardo, Christoph Gerum, Adrian Frischknecht, Konstantin Lübeck, Oliver Bringmann:
UltraTrail: A Configurable Ultralow-Power TC-ResNet AI Accelerator for Efficient Keyword Spotting. 4240-4251 - Diksha Moolchandani, Anshul Kumar, José F. Martínez, Smruti R. Sarangi:
VisSched: An Auction-Based Scheduler for Vision Workloads on Heterogeneous Processors. 4252-4265 - Chun-Feng Wu, Yuan-Hao Chang, Ming-Chang Yang, Tei-Wei Kuo:
When Storage Response Time Catches Up With Overall Context Switch Overhead, What Is Next? 4266-4277 - Gopinath Mahale, Pramod P. Udupa, Kiran Kolar Chandrasekharan, Sehwan Lee:
WinDConv: A Fused Datapath CNN Accelerator for Power-Efficient Edge Devices. 4278-4289 - Xuan Wang, Chao Wang, Jing Cao, Lei Gong, Xuehai Zhou:
WinoNN: Optimizing FPGA-Based Convolutional Neural Network Accelerators Using Sparse Winograd Algorithm. 4290-4302 - Raúl Camposano, Oliver Bringmann:
Wolfgang Rosenstiel. 4308
Volume 39, Number 12, December 2020
- Fikre Tsigabu Gebreyohannes, Jacky Porte, Marie-Minerve Louërat, Hassan Aboushady:
A gm/ID Methodology Based Data-Driven Search Algorithm for the Design of Multistage Multipath Feed-Forward-Compensated Amplifiers Targeting High Speed Continuous-Time ΣΔ-Modulators. 4311-4324 - Zhenxin Zhao, Lihong Zhang:
An Automated Topology Synthesis Framework for Analog Integrated Circuits. 4325-4337 - Tom J. Smy, John H. Rasmussen:
Integration of Traveling Wave Optical Device Models Into an MNA-Based Circuit Simulator. 4338-4350 - Ilho Myeong, Juhyun Kim, Hyungwoo Ko, Ickhyun Song, Yongseok Kim, Hyungcheol Shin:
A Simple and Accurate Modeling Method of Channel Thermal Noise Using BSIM4 Noise Models. 4351-4358 - Satyajit Mohapatra, Nihar Ranjan Mohapatra:
Gradient Error Compensation in SC-MDACs. 4359-4374 - Fábio Passos, Miguel Chanca, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández:
Synthesis of mm-Wave Wideband Receivers in 28-nm CMOS Technology for Automotive Radar Applications. 4375-4384 - Amir Mahdi Hosseini Monazzah, Amir M. Rahmani, Antonio Miele, Nikil D. Dutt:
CAST: Content-Aware STT-MRAM Cache Write Management for Different Levels of Approximation. 4385-4398 - Wei-Ming Chen, Tei-Wei Kuo, Pi-Cheng Hsiu:
Enabling Failure-Resilient Intermittent Systems Without Runtime Checkpointing. 4399-4412 - Guoqi Xie, Renfa Li, Shiyan Hu:
Security-Aware Obfuscated Priority Assignment for CAN FD Messages in Real-Time Parallel Automotive Applications. 4413-4425 - Yunhao Xu, Yingjie Lao, Weiqiang Liu, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Mathematical Modeling Analysis of Strong Physical Unclonable Functions. 4426-4438 - Abhrajit Sengupta, Mohammed Nabeel, Nimisha Limaye, Mohammed Ashraf, Ozgur Sinanoglu:
Truly Stripping Functionality for Logic Locking: A Fault-Based Perspective. 4439-4452 - Asmit De, Aditya Basu, Swaroop Ghosh, Trent Jaeger:
Hardware Assisted Buffer Protection Mechanisms for Embedded RISC-V. 4453-4465 - Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel:
Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging. 4466-4481 - Grace Li Zhang, Bing Li, Meng Li, Bei Yu, David Z. Pan, Michaela Brunner, Georg Sigl, Ulf Schlichtmann:
TimingCamouflage+: Netlist Security Enhancement With Unconventional Timing. 4482-4495 - Ding Deng, Yaohua Wang, Yang Guo:
Novel Design Strategy Toward A2 Trojan Detection Based on Built-In Acceleration Structure. 4496-4509 - Subodha Charles, Yangdi Lyu, Prabhat Mishra:
Real-Time Detection and Localization of Distributed DoS Attacks in NoC-Based SoCs. 4510-4523 - Aijiao Cui, Mengyang Li, Gang Qu, Huawei Li:
A Guaranteed Secure Scan Design Based on Test Data Obfuscation by Cryptographic Hash. 4524-4536 - Jinghao Sun, Nan Guan, Shuangshuang Chang, Feng Li, Qingxu Deng, Wang Yi:
Capacity Augmentation Function for Real-Time Parallel Tasks With Constrained Deadlines Under GEDF Scheduling. 4537-4548 - Yu-Pei Liang, Tseng-Yi Chen, Yuan-Hao Chang, Shuo-Han Chen, Hsin-Wen Wei, Wei-Kuan Shih:
B*-Sort: Enabling Write-Once Sorting for Nonvolatile Memory. 4549-4562 - Ruixiang Ma, Fei Wu, Zhonghai Lu, Wenmin Zhong, Qiulin Wu, Jiguang Wan, Changsheng Xie:
BlockHammer: Improving Flash Reliability by Exploiting Process Variation Aware Proactive Failure Prediction. 4563-4574 - Zhaoyan Shen, Lei Han, Renhai Chen, Chenlin Ma, Zhiping Jia, Zili Shao:
An Efficient Directory Entry Lookup Cache With Prefix-Awareness for Mobile Devices. 4575-4586 - Suzhen Wu, Weidong Zhu, Yingxin Han, Hong Jiang, Bo Mao, Zhijie Huang, Liang Chen:
GC-Steering: GC-Aware Request Steering and Parallel Reconstruction Optimizations for SSD-Based RAIDs. 4587-4600 - Sepideh Safari, Shaahin Hessabi, Ghazal Ershadi:
LESS-MICS: A Low Energy Standby-Sparing Scheme for Mixed-Criticality Systems. 4601-4610 - Yi Wang, Jiali Tan, Rui Mao, Tao Li:
Temperature-Aware Persistent Data Management for LSM-Tree on 3-D NAND Flash Memory. 4611-4622 - Daniel Peroni, Mohsen Imani, Hamid Nejatollahi, Nikil D. Dutt, Tajana Rosing:
Data Reuse for Accelerated Approximate Warps. 4623-4634 - Saravanan Sethuraman, Venkata Kalyan Tavva, Karthick Rajamani, Chitra K. Subramanian, Kyu-Hyoun Kim, Hillery C. Hunter, M. B. Srinivas:
Temperature Aware Adaptations for Improved Read Reliability in STT-MRAM Memory Subsystem. 4635-4644 - Govind Radhakrishnan, Youngki Yoon, Manoj Sachdev:
Monitoring Aging Defects in STT-MRAMs. 4645-4656 - Philipp Niemann, Alwin Zulehner, Rolf Drechsler, Robert Wille:
Overcoming the Tradeoff Between Accuracy and Compactness in Decision Diagrams for Quantum Computation. 4657-4668 - Hai Jin, Di Chen, Haikun Liu, Xiaofei Liao, Rentong Guo, Yu Zhang:
Miss Penalty Aware Cache Replacement for Hybrid Memory Systems. 4669-4682 - Xiangzhen Zhou, Sanjiang Li, Yuan Feng:
Quantum Circuit Transformation Based on Simulated Annealing and Heuristic Search. 4683-4694 - Renjie Yao, Yaoyao Ye:
Toward a High-Performance and Low-Loss Clos-Benes-Based Optical Network-on-Chip Architecture. 4695-4706 - Yi Cai, Yujun Lin, Lixue Xia, Xiaoming Chen, Song Han, Yu Wang, Huazhong Yang:
Long Live TIME: Improving Lifetime and Security for NVM-Based Training-in-Memory Systems. 4707-4720 - Pengcheng Zhu, Zhijin Guan, Xueyun Cheng:
A Dynamic Look-Ahead Heuristic for the Qubit Mapping Problem of NISQ Computers. 4721-4735 - Ziru Li, Bing Li, Zichen Fan, Hai Li:
RED: A ReRAM-Based Efficient Accelerator for Deconvolutional Computation. 4736-4747 - Jinglan Liu, Jiaxin Zhang, Yukun Ding, Xiaowei Xu, Meng Jiang, Yiyu Shi:
Binarizing Weights Wisely for Edge Intelligence: Guide for Partial Binarization of Deconvolution-Based Generators. 4748-4759 - Aseem Sayal, Paras Ajay, Mark W. McDermott, S. V. Sreenivasan, Jaydeep P. Kulkarni:
M2A2: Microscale Modular Assembled ASICs for High-Mix, Low-Volume, Heterogeneously Integrated Designs. 4760-4776 - Thibaut Marty, Tomofumi Yuki, Steven Derrien:
Safe Overclocking for CNN Accelerators Through Algorithm-Level Error Detection. 4777-4790 - Yazhu Lan, Kent W. Nixon, Qingli Guo, Guohe Zhang, Yuanchao Xu, Hai Li, Yiran Chen:
FCDM: A Methodology Based on Sensor Pattern Noise Fingerprinting for Fast Confidence Detection to Adversarial Attacks. 4791-4804 - Weiwen Jiang, Lei Yang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Shouzhen Gu, Sakyasingha Dasgupta, Yiyu Shi, Jingtong Hu:
Hardware/Software Co-Exploration of Neural Architectures. 4805-4815 - Xueyu Han, Jiajia Chen, Boyu Qin, Susanto Rahardja:
A Novel Area-Power Efficient Design for Approximated Small-Point FFT Architecture. 4816-4827 - Young-kyu Choi, Yuze Chi, Jie Wang, Jason Cong:
FLASH: Fast, Parallel, and Accurate Simulator for HLS. 4828-4841 - Jochen Rust, Moritz Bärthel, Pascal Seidel, Steffen Paul:
A Hardware Generator for SORN Arithmetic. 4842-4853 - Vitaly G. Levashenko, Igor Lukyanchuk, Elena Zaitseva, Miroslav Kvassay, Jan Rabcan, Patrik Rusnak:
Development of Programmable Logic Array for Multiple-Valued Logic Functions. 4854-4866 - Dong Wang, Ke Xu, Jingning Guo, Soheil Ghiasi:
DSP-Efficient Hardware Acceleration of Convolutional Neural Network Inference on FPGAs. 4867-4880 - Bosheng Liu, Xiaoming Chen, Yinhe Han, Haobo Xu:
Swallow: A Versatile Accelerator for Sparse Neural Networks. 4881-4893 - Weihong Xu, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Reconfigurable and Low-Complexity Accelerator for Convolutional and Generative Networks Over Finite Fields. 4894-4907 - Mohammed Shayan, Tung-Che Liang, Sukanta Bhattacharjee, Krishnendu Chakrabarty, Ramesh Karri:
Toward Secure Checkpointing for Micro-Electrode-Dot-Array Biochips. 4908-4920 - Zhanwei Zhong, Krishnendu Chakrabarty:
IJTAG-Based Fault Recovery and Robust Microelectrode-Cell Design for MEDA Biochips. 4921-4934 - Ming Yang, Wenjian Yu:
Floating Random Walk Capacitance Solver Tackling Conformal Dielectric With On-the-Fly Sampling on Eight-Octant Transition Cubes. 4935-4943 - Zhuo Feng:
GRASS: Graph Spectral Sparsification Leveraging Scalable Spectral Perturbation Analysis. 4944-4957 - Chunfeng Cui, Kaikai Liu, Zheng Zhang:
Chance-Constrained and Yield-Aware Optimization of Photonic ICs With Non-Gaussian Correlated Process Variations. 4958-4970 - Fulin Peng, Handi Yu, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Efficient Statistical Analysis for Correlated Rare Failure Events via Asymptotic Probability Approximation. 4971-4984 - Hyun-jeong Kwon, Sung-Yun Lee, Young Hwan Kim, Seokhyeong Kang:
Additive Statistical Leakage Analysis Using Exponential Mixture Model. 4985-4998 - Xiao Shi, Hao Yan, Jinxin Wang, Jiajia Zhang, Longxing Shi, Lei He:
An Efficient Adaptive Importance Sampling Method for SRAM and Analog Yield Analysis. 4999-5010 - Di Gao, Dayane Reis, Xiaobo Sharon Hu, Cheng Zhuo:
Eva-CiM: A System-Level Performance and Energy Evaluation Framework for Computing-in-Memory Architectures. 5011-5024 - Nahid Mirzaie, Ron Rohrer:
A Macromodeling Approach for Analog Behavior of Digital Integrated Circuits. 5025-5031 - Xun Jiao, Dongning Ma, Wanli Chang, Yu Jiang:
LEVAX: An Input-Aware Learning-Based Error Model of Voltage-Scaled Functional Units. 5032-5041 - Jianli Chen, Zhifeng Lin, Yun-Chih Kuo, Chau-Chin Huang, Yao-Wen Chang, Shih-Chun Chen, Chun-Han Chiang, Sy-Yen Kuo:
Clock-Aware Placement for Large-Scale Heterogeneous FPGAs. 5042-5055 - Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Wei-Zen Chen:
Exploring Multiple Analog Placements With Partial-Monotonic Current Paths and Symmetry Constraints Using PCP-SP. 5056-5068 - Yuzhe Ma, Wei Zhong, Shuxiang Hu, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu:
A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization. 5069-5082 - Yibo Lin, Wuxi Li, Jiaqi Gu, Haoxing Ren, Brucek Khailany, David Z. Pan:
ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs. 5083-5096 - Dongwon Park, Daeyeal Lee, Ilgweon Kang, Chester Holtz, Sicun Gao, Bill Lin, Chung-Kuan Cheng:
Grid-Based Framework for Routability Analysis and Diagnosis With Conditional Design Rules. 5097-5110 - Monzurul Islam Dewan, Dae Hyun Kim:
NP-Separate: A New VLSI Design Methodology for Area, Power, and Performance Optimization. 5111-5122 - Emilio Wuerges:
3-Step Rectilinear Minimum Spanning Tree Construction for Obstacle-Avoiding Component-to-Component Routing. 5123-5127 - Ziran Zhu, Jianli Chen, Wenxing Zhu, Yao-Wen Chang:
Mixed-Cell-Height Legalization Considering Technology and Region Constraints. 5128-5141 - An Zou, Jingwen Leng, Xin He, Yazhou Zu, Christopher D. Gill, Vijay Janapa Reddi, Xuan Zhang:
Voltage-Stacked Power Delivery Systems: Reliability, Efficiency, and Power Management. 5142-5155 - Jinghan Zhang, Hamed Tabkhi, Gunar Schirner:
Allocating One Common ACC-Rich Platform for Many Streaming Applications. 5156-5169 - Jingyu Wang, Zhe Yuan, Ruoyang Liu, Xiaoyu Feng, Li Du, Huazhong Yang, Yongpan Liu:
GAAS: An Efficient Group Associated Architecture and Scheduler Module for Sparse CNN Accelerators. 5170-5182 - Ayse K. Coskun, Furkan Eris, Ajay Joshi, Andrew B. Kahng, Yenai Ma, Aditya Narayan, Vaishnav Srinivas:
Cross-Layer Co-Optimization of Network Design and Chiplet Placement in 2.5-D Systems. 5183-5196 - Alexandre Truppel, Tsun-Ming Tseng, Davide Bertozzi, José Carlos Alves, Ulf Schlichtmann:
PSION+: Combining Logical Topology and Physical Layout Optimization for Wavelength-Routed ONoCs. 5197-5210 - Hsin-I Wu, Da-Yi Guo, Ren-Song Tsay:
A Virtualization-Assisted Full-System Simulation Approach for the Verification of System Intercomponent Interactions. 5211-5224 - Iftikhar A. Soomro, Mohammad Samie, Ian K. Jennions:
Test Time Reduction of 3-D Stacked ICs Using Ternary Coded Simultaneous Bidirectional Signaling in Parallel Test Ports. 5225-5237 - Irith Pomeranz:
Direct Computation of LFSR-Based Stored Tests for Broadside and Skewed-Load Tests. 5238-5246 - Johan Lidén Eddeland, Koen Claessen, Nicholas Smallbone, Zahra Ramezani, Sajed Miremadi, Knut Åkesson:
Enhancing Temporal Logic Falsification With Specification Transformation and Valued Booleans. 5247-5260 - Irith Pomeranz, Srikanth Venkataraman:
LFSR-Based Test Generation for Reduced Fail Data Volume. 5261-5266 - Neil Veira, Zissis Poulos, Andreas G. Veneris:
Searching for Bugs Using Probabilistic Suspect Implications. 5267-5280 - Denny C.-Y. Wu, Aaron C.-W. Liang, Charles H.-P. Wen:
Speeding Up Functional Timing Analysis by Concise Formulation of Timed Characteristic Functions. 5281-5294 - Gabriel A. G. Andrade, Marleson Graf, Nícolas Pfeifer, Luiz C. V. dos Santos:
A Directed Test Generator for Shared-Memory Verification of Multicore Chip Designs. 5295-5303 - Chia-Chun Lin, Chin-Heng Liu, Yung-Chih Chen, Chun-Yao Wang:
A New Necessary Condition for Threshold Function Identification. 5304-5308 - Mikhail M. Pilipko, Dmitry V. Morozov:
An Algorithm for the Search of a Low Capacitor Count DAC Switching Scheme for SAR ADCs. 5309-5313
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