Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 39
Volume 39, Number 1, January 2020
- António Canelas
, Ricardo Póvoa, Ricardo Martins, Nuno Lourenço, Jorge Guilherme, João Paulo Carvalho, Nuno Horta:
FUZYE: A Fuzzy c-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms. 1-13
- Xiaoxue Sun, Chenyang Kong, Yingyu Chen, Jun Tao, Zhangwen Tang:
A Synthesizable Constant Tuning Gain Technique for Wideband LC-VCO Design. 14-24 - Ahmad Shabani, Bijan Alizadeh:
PMTP: A MAX-SAT-Based Approach to Detect Hardware Trojan Using Propagation of Maximum Transition Probability. 25-33 - Zhipeng Guo, Ming Tang, Emmanuel Prouff, Maixing Luo, Fei Yan:
Table Recomputation-Based Higher-Order Masking Against Horizontal Attacks. 34-44 - Dmitry Utyamishev, Inna Partin-Vaisband:
Real-Time Detection of Power Analysis Attacks by Machine Learning of Power Supply Variations On-Chip. 45-55 - Bohun Seo, Hyeonggyu Kim, Soontae Kim:
Freezing: Eliminating Unnecessary Drawing Computation for Low Power. 56-61 - Yuncheng Guo, Yu Hua, Pengfei Zuo:
A Latency-Optimized and Energy-Efficient Write Scheme in NVM-Based Main Memory. 62-74 - Chen Li, Andrew Zigerelli, Jun Yang, Youtao Zhang, Sheng Ma, Yang Guo:
A Dynamic and Proactive GPU Preemption Mechanism Using Checkpointing. 75-87 - Yue Ma, Junlong Zhou, Thidapat Chantem, Robert P. Dick, Shige Wang, Xiaobo Sharon Hu:
Online Resource Management for Improving Reliability of Real-Time Systems on "Big-Little" Type MPSoCs. 88-100 - Santiago Pagani, Sai Manoj P. D., Axel Jantsch, Jörg Henkel:
Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey. 101-116 - Lei Deng, Yuan Xie, Ling Liang, Guanrui Wang, Liang Chang, Xing Hu, Xin Ma, Liu Liu, Jing Pei, Guoqi Li:
SemiMap: A Semi-Folded Convolution Mapping for Speed-Overhead Balance on Crossbars. 117-130 - Duo Liu, Xingni Li, Po-Chun Huang, Yi Gu, Yingjian Ling, Kan Zhong, Renping Liu, Xianzhang Chen, Liang Liang:
Downsizing Without Downgrading: Approximated Dynamic Time Warping on Nonvolatile Memories. 131-144 - Giuseppe Tagliavini, Andrea Marongiu, Luca Benini:
FlexFloat: A Software Library for Transprecision Computing. 145-156 - Jiayi Weng, Tsung-Yi Ho, Weiqing Ji, Peng Liu, Mengdi Bao, Hailong Yao:
URBER: Ultrafast Rule-Based Escape Routing Method for Large-Scale Sample Delivery Biochips. 157-170 - Jack Tang, Mohamed Ibrahim, Krishnendu Chakrabarty, Ramesh Karri:
Synthesis of Tamper-Resistant Pin-Constrained Digital Microfluidic Biochips. 171-184 - Zonghui Li, Hai Wan, Yangdong Deng, Xibin Zhao, Yue Gao, Xiaoyu Song, Ming Gu:
Time-Triggered Switch-Memory-Switch Architecture for Time-Sensitive Networking Switches. 185-198 - Song Chen, Jinglei Huang, Xiaodong Xu, Bo Ding, Qi Xu:
Integrated Optimization of Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems. 199-212 - Lucas Machado, Jordi Cortadella:
Support-Reducing Decomposition for FPGA Mapping. 213-224 - Alessandro Zanco, Stefano Grivet-Talocia, Tommaso Bradde, Marco De Stefano:
Enforcing Passivity of Parameterized LTI Macromodels via Hamiltonian-Driven Multivariate Adaptive Sampling. 225-238 - Liyang Lai, Kun-Han Tsai, Huawei Li:
GPGPU-Based ATPG System: Myth or Reality? 239-247 - Binod Kumar, Kanad Basu, Masahiro Fujita, Virendra Singh:
Post-Silicon Gate-Level Error Localization With Effective and Combined Trace Signal Selection. 248-261 - Irith Pomeranz:
Multicycle Broadside and Skewed-Load Tests for Test Compaction. 262-266 - Junyan Qian, Hao Ding, Hanpeng Xiao, Zhide Zhou, Lingzhong Zhao, Zhongyi Zhai:
Efficient Reconfiguration Algorithm With Flexible Rerouting Schemes for Constructing 3-D VLSI Subarrays. 267-271 - Siamack BeigMohammadi, Bijan Alizadeh:
Combinational Hybrid Signal Selection With Updated Reachability Lists for Post-Silicon Debug. 272-276 - Chuan Xu, Seshadri K. Kolluri, Kazuhiko Endo, Kaustav Banerjee:
Correction to "Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability". 277
Volume 39, Number 2, February 2020
- Umamaheswara Rao Tida, Cheng Zhuo, Leibo Liu, Yiyu Shi:
Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clocking. 281-293 - Ibtissem Seghaier, Mohamed H. Zaki, Sofiène Tahar:
Mating Sensitivity Analysis and Statistical Verification for Efficient Yield Estimation. 294-307 - Jae-Won Jang, Asmit De, Deepak Vontela, Ithihasa Reddy Nirmala, Swaroop Ghosh, Anirudh Iyengar:
Threshold-Defined Logic and Interconnect for Protection Against Reverse Engineering. 308-320 - Li-Pin Chang, Chia-Hsiang Cheng, Shu-Ting Chang, Po-Han Chou:
Current-Aware Flash Scheduling for Current Capping in Solid State Disks. 321-334 - Mingze Gao, Gang Qu:
Estimate and Recompute: A Novel Paradigm for Approximate Computing on Data Flow Graphs. 335-345 - Daniel Peroni, Mohsen Imani, Tajana Simunic Rosing:
Runtime Efficiency-Accuracy Tradeoff Using Configurable Floating Point Multiplier. 346-358 - Yasamin Moradi, Mohamed Ibrahim, Krishnendu Chakrabarty, Ulf Schlichtmann:
An Efficient Fault-Tolerant Valve-Based Microfluidic Routing Fabric for Droplet Barcoding in Single-Cell Analysis. 359-372 - Shuo-Han Chen, Tseng-Yi Chen, Yuan-Hao Chang, Hsin-Wen Wei, Wei-Kuan Shih:
A Partial Page Cache Strategy for NVRAM-Based Storage Devices. 373-386 - Andreas Grimmer, Werner Haselmayr, Robert Wille:
Automatic Droplet Sequence Generation for Microfluidic Networks With Passive Droplet Routing. 387-396 - Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino:
Logic Synthesis of Pass-Gate Logic Circuits With Emerging Ambipolar Technologies. 397-410 - Minghua Shen, Wentai Zhang, Guojie Luo, Nong Xiao:
Serial-Equivalent Static and Dynamic Parallel Routing for FPGAs. 411-423 - Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-Sun Seo:
Automatic Compilation of Diverse CNNs Onto High-Performance FPGA Accelerators. 424-437 - Tao Luo, Xuan Wang, Chuping Qu, Matthew Kay Fei Lee, Wai Teng Tang, Weng-Fai Wong, Rick Siow Mong Goh:
An FPGA-Based Hardware Emulator for Neuromorphic Chip With RRAM. 438-450 - Shigetaka Kumashiro, Tatsuya Kamei, Akira Hiroki, Kazutoshi Kobayashi:
An Efficient and Accurate Time Step Control Method for Power Device Transient Simulation Utilizing Dominant Time Constant Approximation. 451-463 - Panagiota Papavramidou, Michael Nicolaidis:
Iterative Diagnosis Approach for ECC-Based Memory Repair. 464-477 - Kwangsoo Han, Andrew B. Kahng, Jiajia Li:
Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution. 478-491 - Mehran Goli, Jannis Stoppe, Rolf Drechsler:
Automated Nonintrusive Analysis of Electronic System Level Designs. 492-505 - Yang Yu, Xu Fang, Xiyuan Peng:
A Post-Bond TSV Test Method Based on RGC Parameters Measurement. 506-519 - Mayler G. A. Martins, Samuel N. Pagliarini, Mehmet Meric Isgenc, Lawrence T. Pileggi:
From Virtual Characterization to Test-Chips: DFM Analysis Through Pattern Enumeration. 520-532 - Debjit Pal, Sai Ma, Shobha Vasudevan:
Emphasizing Functional Relevance Over State Restoration in Post-Silicon Signal Tracing. 533-546 - Jiali Luan, Zheng Zhang:
Prediction of Multidimensional Spatial Variation Data via Bayesian Tensor Completion. 547-551
Volume 39, Number 3, March 2020
- Mohammad Abdul Alim, Mayahsa M. Ali, Ali A. Rezazadeh, Christophe Gaquière:
Temperature Dependence of the Taylor Series Coefficients and Intermodulation Distortion Characteristics of GaN HEMT. 552-559 - Fábio Passos, Elisenda Roca, Javier J. Sieiro, Rafaella Fiorelli, Rafael Castro-López, José María López-Villegas, Francisco V. Fernández:
A Multilevel Bottom-Up Optimization Methodology for the Automated Synthesis of RF Systems. 560-571 - Farzad Samie, Vasileios Tsoutsouras, Dimosthenis Masouros, Lars Bauer, Dimitrios Soudris, Jörg Henkel:
Fast Operation Mode Selection for Highly Efficient IoT Edge Devices. 572-584 - Po-Hao Huang, Ya-Shu Chen, Jian-He Liao:
QT-Adaptation Engine: Adaptive QoS-Aware Scheduling and Governing in Thermally Constrained Mobile Devices. 585-598 - Yazhi Feng, Dan Feng, Wei Tong, Jingning Liu, Shuai Li:
Multiple Subpage Writing FTL in MLC by Exploiting Dual Mode Operations. 599-612 - Qin Wang, Ulf Schlichtmann, Yici Cai, Weiqing Ji, Zeyan Li, Haena Cheong, Oh-Sun Kwon, Hailong Yao, Tsung-Yi Ho, Kwanwoo Shin, Bing Li:
Integrated Control-Fluidic Codesign Methodology for Paper-Based Digital Microfluidic Biochips. 613-625 - Peng Yang, Zhehui Wang, Zhifei Wang, Jiang Xu, Yi-Shing Chang, Xuanqi Chen, Rafael K. V. Maeda, Jun Feng:
Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems. 626-639 - Zhifei Wang, Peng Yang, Yi-Shing Chang, Jiang Xu, Xuanqi Chen, Zhehui Wang, Jun Feng:
A Cross-Layer Optimization Framework for Integrated Optical Switches in Data Centers. 640-653 - Sanbao Su, Chen Zou, Weijiang Kong, Jie Han, Weikang Qian:
A Novel Heuristic Search Method for Two-Level Approximate Logic Synthesis. 654-669 - Sedigheh Kouhpayeh-Zadeh-Esfahani, Abdolali Abdipour, Kambiz Afrooz:
Fast Methodology for Time-Domain Analysis of Nonlinear-Loaded Transmission Line Excited by an Arbitrary Modulated Signal. 670-674 - Yen-Yu Su, Shuo-Hui Wang, Wei-Liang Wu, Mark Po-Hung Lin:
Corner-Stitching-Based Multilayer Obstacle-Avoiding Component-to-Component Rectilinear Minimum Spanning Tree Construction. 675-685 - Zuomin Zhu, Wei Zhang, Vivek Chaturvedi, Amit Kumar Singh:
Energy Minimization for Multicore Platforms Through DVFS and VR Phase Scaling With Comprehensive Convex Model. 686-699 - Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu:
Hierarchical Symbol-Based Health-Status Analysis Using Time-Series Data in a Core Router System. 700-713 - Ying Zhang, Krishnendu Chakrabarty, Zebo Peng, Ahmed Rezine, Huawei Li, Petru Eles, Jianhui Jiang:
Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors. 714-727 - Gabriel A. G. Andrade, Marleson Graf, Luiz C. V. dos Santos:
Chaining and Biasing: Test Generation Techniques for Shared-Memory Verification. 728-741 - Irith Pomeranz:
Reverse Low-Power Broadside Tests. 742-746 - Augusto Neutzling, Felipe S. Marranghello, Jody Maick Matos, André Inácio Reis, Renato P. Ribas:
maj-n Logic Synthesis for Emerging Technology. 747-751
Volume 39, Number 4, April 2020
- Indrani Roy, Chester Rebeiro, Aritra Hazra, Swarup Bhunia:
SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations. 752-765 - Abhrajit Sengupta, Bodhisatwa Mazumdar, Muhammad Yasin, Ozgur Sinanoglu:
Logic Locking With Provable Security Against Power Analysis Attacks. 766-778 - Mohsen Ansari, Amir Yeganeh-Khaksar, Sepideh Safari, Alireza Ejlali:
Peak-Power-Aware Energy Management for Periodic Real-Time Applications. 779-788 - Xiaotao Jia, Jianlei Yang, Pengcheng Dai, Runze Liu, Yiran Chen, Weisheng Zhao:
SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing. 789-802 - Bi Wu, Pengcheng Dai, Yuanqing Cheng, Ying Wang, Jianlei Yang, Zhaohao Wang, Dijun Liu, Weisheng Zhao:
A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration. 803-815 - Sukanta Bhattacharjee, Robert Wille, Juinn-Dar Huang, Bhargab B. Bhattacharya:
Storage-Aware Algorithms for Dilution and Mixture Preparation With Flow-Based Lab-on-Chip. 816-829 - Dekui Wang, Zhenhua Duan, Cong Tian, Bohu Huang, Nan Zhang:
ParRA: A Shared Memory Parallel FPGA Router Using Hybrid Partitioning Approach. 830-842 - Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-Sun Seo:
Performance Modeling for CNN Inference Accelerators on FPGA. 843-856 - Yun Liang, Liqiang Lu, Qingcheng Xiao, Shengen Yan:
Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs. 857-870 - Winston Haaswijk, Mathias Soeken, Alan Mishchenko, Giovanni De Micheli:
SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism. 871-884 - Sheriff Sadiqbatcha, Zeyu Sun, Sheldon X.-D. Tan:
Accelerating Electromigration Aging: Fast Failure Detection for Nanometer ICs. 885-894 - Fulya Kaplan, Mostafa Said, Sherief Reda, Ayse K. Coskun:
LoCool: Fighting Hot Spots Locally for Improving System Energy Efficiency. 895-908 - Fei Wu, Meng Zhang, Yajuan Du, Weihua Liu, Zuo Lu, Jiguang Wan, Zhi-hu Tan, Changsheng Xie:
Using Error Modes Aware LDPC to Improve Decoding Performance of 3-D TLC NAND Flash. 909-921 - Neetu Jindal, Shubhani Gupta, Divya Praneetha Ravipati, Preeti Ranjan Panda, Smruti R. Sarangi:
Enhancing Network-on-Chip Performance by Reusing Trace Buffers. 922-935 - Irith Pomeranz:
Switching Activity of Faulty Circuits in Presence of Multiple Transition Faults. 936-945 - Ming Yang, Wenjian Yu:
Reliable Macromodel Generation for the Capacitance Extraction Based on Macromodel-Aware Random Walk Algorithm. 946-951
Volume 39, Number 5, May 2020
- Danil Sokolov, Victor Khomenko, Andrey Mokhov, Vladimir Dubikhin, David Lloyd, Alex Yakovlev:
Automating the Design of Asynchronous Logic Control for AMS Electronics. 952-965 - Ahcène Bounceur, Salvador Mir, Reinhardt Euler, Kamel Beznia:
Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate Extreme Value Model. 966-976 - Xuanqi Chen, Zhifei Wang, Yi-Shing Chang, Jiang Xu, Jun Feng, Peng Yang, Zhehui Wang, Luan H. K. Duong:
Modeling and Analysis of Optical Modulators Based on Free-Carrier Plasma Dispersion Effect. 977-990 - Qian Zhang, Qiang Xu:
ApproxIt: A Quality Management Framework of Approximate Computing for Iterative Methods. 991-1002 - Jack Tang, Mohamed Ibrahim, Krishnendu Chakrabarty, Ramesh Karri:
Analysis and Design of Tamper-Mitigating Microfluidic Routing Fabrics. 1003-1016 - Othon Tomoutzoglou, Dimitrios Mbakoyiannis, George Kornaros, Marcello Coppola:
Efficient Job Offloading in Heterogeneous Systems Through Hardware-Assisted Packet-Based Dispatching and User-Level Runtime Infrastructure. 1017-1030 - Dalin Li, Lan Huang, Teng Gao, Yang Feng, Adriano Tavares, Kangping Wang:
An Extended Nonstrict Partially Ordered Set-Based Configurable Linear Sorter on FPGAs. 1031-1044 - Jingwen Ding, Shigeru Yamashita:
Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D Architecture and Its Application to Large-Scale Circuits. 1045-1058 - Mohammad Reza Rohanipoor, Behnam Ghavami, Mohsen Raji:
Improving Combinational Circuit Reliability Against Multiple Event Transients via a Partition and Restructuring Approach. 1059-1072 - Sitansusekhar Roymohapatra, Ganesh R. Gore, Akanksha Yadav, Mahesh B. Patil, Krishnan S. Rengarajan, Subramanian S. Iyer, Maryam Shojaei Baghini:
A Novel Hierarchical Circuit LUT Model for SOI Technology for Rapid Prototyping. 1073-1083 - Chris Yakopcic, Tarek M. Taha, David J. Mountain, Thomas Salter, Matthew J. Marinella, Mark R. McLean:
Memristor Model Optimization Based on Parameter Extraction From Device Characterization Data. 1084-1095 - Guan-Qi Fang, Yong Zhong, Yi-Hao Cheng, Shao-Yun Fang:
Obstacle-Avoiding Open-Net Connector With Precise Shortest Distance Estimation. 1096-1108 - Prachi Joshi, S. S. Ravi, Qingyu Liu, Unmesh D. Bordoloi, Soheil Samii, Sandeep Kumar Shukla, Haibo Zeng:
Approaches for Assigning Offsets to Signals for Improving Frame Packing in CAN-FD. 1109-1122 - Shaahin Angizi, Zhezhi He, Amro Awad, Deliang Fan:
MRIMA: An MRAM-Based In-Memory Accelerator. 1123-1136 - Sameh El-Ashry, Mostafa Khamis, Hala Ibrahim, Ahmed Shalaby, Mohamed Abdelsalam, M. Watheq El-Kharashi:
On Error Injection for NoC Platforms: A UVM-Based Generic Verification Environment. 1137-1150
Volume 39, Number 6, June 2020
- Bon Woong Ku, Kyungwook Chang, Sung Kyu Lim:
Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs. 1151-1164 - Sheng-En David Lin, Dae Hyun Kim:
Construction of All Rectilinear Steiner Minimum Trees on the Hanan Grid and Its Applications to VLSI Design. 1165-1176 - Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan Rakai, Ismail Bustany, Andrew A. Kennings, Laleh Behjat:
Eh?Predictor: A Deep Learning Framework to Identify Detailed Routing Short Violations From a Placed Netlist. 1177-1190 - Song Chen, Mengke Ge, Zhigang Li, Jinglei Huang, Qi Xu, Feng Wu:
Generalized Fault-Tolerance Topology Generation for Application-Specific Network-on-Chips. 1191-1204 - Daifeng Guo, Hongbo Zhang, Martin D. F. Wong:
On Coloring Rectangular and Diagonal Grid Graphs for Multipatterning and DSA Lithography. 1205-1216 - Gengjie Chen, Evangeline F. Y. Young:
SALT: Provably Good Routing Topology by a Novel Steiner Shallow-Light Tree Algorithm. 1217-1230 - Raphael Andreoni Camponogara Viera, Philippe Maurine, Jean-Max Dutertre, Rodrigo Possamai Bastos:
Simulation and Experimental Demonstration of the Importance of IR-Drops During Laser Fault Injection. 1231-1244 - Peishan Tu, Chak-Wa Pui, Evangeline F. Y. Young:
Simultaneous Reconnection Surgery Technique of Routing With Machine Learning-Based Acceleration. 1245-1257 - Brent J. Maundy, Ahmed S. Elwakil, Leonid Belostotski:
Automatic Generation of Differential-Input Differential-Output Second-Order Filters Based on a Differential Pair. 1258-1271 - Mohammad Hosseinabady, José Luis Núñez-Yáñez:
A Streaming Dataflow Engine for Sparse Matrix-Vector Multiplication Using High-Level Synthesis. 1272-1285 - Shuo-Han Chen, Che-Wei Tsao, Yuan-Hao Chang:
Beyond Address Mapping: A User-Oriented Multiregional Space Management Design for 3-D NAND Flash Memory. 1286-1299 - Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev, Nandakishore Santhi, Tobias Grosser, Rumen Andonov:
Optimization Approach to Accelerator Codesign. 1300-1313 - Xing Huang, Tsung-Yi Ho, Krishnendu Chakrabarty, Wenzhong Guo:
Timing-Driven Flow-Channel Network Construction for Continuous-Flow Microfluidic Biochips. 1314-1327 - Kyle Kuan, Tosiron Adegbija:
Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design. 1328-1339 - Yi-Cheng Kung, Kuen-Jong Lee, Sudhakar M. Reddy:
Generating Single- and Double-Pattern Tests for Multiple CMOS Fault Models in One ATPG Run. 1340-1345 - Maciej J. Ciesielski, Tiankai Su, Atif Yasin, Cunxi Yu:
Understanding Algebraic Rewriting for Arithmetic Circuit Verification: A Bit-Flow Model. 1346-1357
Volume 39, Number 7, July 2020
- Ebadollah Taheri, Mihailo Isakov, Ahmad Patooghy, Michel A. Kinsy:
Addressing a New Class of Reliability Threats in 3-D Network-on-Chips. 1358-1371 - Ye X. Ding, Florin Burcea, Husni M. Habal, Helmut E. Graeb:
PASTEL: Parasitic Matching-Driven Placement and Routing of Capacitor Arrays With Generalized Ratios in Charge-Redistribution SAR-ADCs. 1372-1385 - Zonghui Li, Hai Wan, Yangdong Deng, Xibin Zhao, Yue Gao, Xiaoyu Song, Ming Gu:
Model-Based Adaptation of Mixed-Criticality Multiservice Systems for Extreme Physical Environments. 1386-1399 - Hai Wang, Xingxing Guo, Sheldon X.-D. Tan, Chi Zhang, He Tang, Yuan Yuan:
Leakage-Aware Predictive Thermal Management for Multicore Systems Using Echo State Network. 1400-1413 - Yi Cai, Tianqi Tang, Lixue Xia, Boxun Li, Yu Wang, Huazhong Yang:
Low Bit-Width Convolutional Neural Network on RRAM. 1414-1427 - Jieru Zhao,