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2020 – today
- 2024
[c13]Johannes Kliemt
, Markus Fritscher, Dietmar Fey:
Comparison of a Binary Signed-Digit Adder with Conventional Binary Adder Circuits on Layout Level. ARCS 2024: 236-248- [c12]Jianan Wen, Andrea Baroni, Eduardo Perez, Max Uhlmann, Markus Fritscher, Karthik KrishneGowda, Markus Ulbricht, Christian Wenger, Milos Krstic:
Towards Reliable and Energy-Efficient RRAM Based Discrete Fourier Transform Accelerator. DATE 2024: 1-6 - [c11]Markus Fritscher, Max Uhlmann, Philip Ostrovskyy, Daniel Reiser, Junchao Chen, Markus Andreas Schubert, Carsten Schulze, Gerhard Kahmen, Dietmar Fey, Marc Reichenbach, Milos Krstic, Christian Wenger:
Area-Efficient Digital Design Using RRAM-CMOS Standard Cells. ISVLSI 2024: 81-87 - [c10]Markus Fritscher, Christian Wenger, Milos Krstic:
From Device to Application - Integrating RRAM Accelerator Blocks into Large AI Systems. ISVLSI 2024: 592 - [c9]Jianan Wen, Fabian Luis Vargas, Fukun Zhu, Daniel Reiser, Andrea Baroni, Markus Fritscher, Eduardo Pérez, Marc Reichenbach, Christian Wenger, Milos Krstic:
Cycle-Accurate FPGA Emulation of RRAM Crossbar Array: Efficient Device and Variability Modeling with Energy Consumption Assessment. LATS 2024: 1-6 - 2023
- [j1]Abhinav Vishwakarma, Markus Fritscher, Amelie Hagelauer, Marc Reichenbach:
An RRAM-based building block for reprogrammable non-uniform sampling ADCs. it Inf. Technol. 65(1-2): 39-51 (2023) - [c8]Daniel Reiser, Marc Reichenbach, Tommaso Rizzi, Andrea Baroni, Markus Fritscher, Christian Wenger, Cristian Zambelli, Davide Bertozzi:
Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations. NEWCAS 2023: 1-5 - [c7]Max Uhlmann, Emilio Pérez-Bosch Quesada, Markus Fritscher, Eduardo Pérez, Markus Andreas Schubert, Marc Reichenbach, Philip Ostrovskyy, Christian Wenger, Gerhard Kahmen:
One-Transistor-Multiple-RRAM Cells for Energy-Efficient In-Memory Computing. NEWCAS 2023: 1-5 - [c6]Markus Fritscher, Alessandro Veronesi, Andrea Baroni, Jianan Wen, Thorsten Spätling, Mamathamba Kalishettyhalli Mahadevaiah, Norbert Herfurth, Eduardo Perez, Markus Ulbricht, Marc Reichenbach, Amelie Hagelauer, Milos Krstic:
Prototyping Reconfigurable RRAM-Based AI Accelerators Using the RISC-V Ecosystem and Digital Twins. ISC Workshops 2023: 500-514 - 2022
- [c5]Markus Fritscher, Gabriel Dengler, Cord Bleibaum, Michael Niebisch, Reinhard German:
Accelerating Veins Simulations by Utilizing Task Parallelism on a HPC Cluster without Introducing Major Inaccuracies. CSNDSP 2022: 275-280 - 2021
- [c4]Markus Fritscher, Johannes Knödtel, Daniel Reiser, Maen Mallah, Stefan Pechmann, Dietmar Fey, Marc Reichenbach:
Simulating large neural networks embedding MLC RRAM as weight storage considering device variations. LASCAS 2021: 1-4 - [c3]Markus Fritscher, Johannes Knödtel, Maen Mallah, Stefan Pechmann, Emilio Pérez-Bosch Quesada, Tommaso Rizzi, Christian Wenger, Marc Reichenbach:
Mitigating the Effects of RRAM Process Variation on the Accuracy of Artificial Neural Networks. SAMOS 2021: 401-417 - 2020
- [c2]Johannes Knödtel, Markus Fritscher, Daniel Reiser, Dietmar Fey, Marco Breiling, Marc Reichenbach:
A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories. MOCAST 2020: 1-6
2010 – 2019
- 2019
- [c1]Markus Fritscher, Johannes Knödtel, Marc Reichenbach, Dietmar Fey:
Simulating Memristive Systems in Mixed-Signal Mode using Commercial Design Tools. ICECS 2019: 225-228
Coauthor Index
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