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Antonio Toro-Frías
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2010 – 2019
- 2019
- [c8]Antonio Toro-Frías, Pablo Saraza-Canflanca, Fábio Passos, Pablo Martín-Lloret, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator. DATE 2019: 78-83 - 2018
- [c7]Antonio Toro-Frías, Pablo Martín-Lloret, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs. SMACD 2018: 1-9 - [c6]Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Automated Massive RTN Characterization Using a Transistor Array Chip. SMACD 2018: 29-32 - [c5]Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Antonio Toro-Frías, Rafael Castro-López, Javier Martín-Martínez, Elisenda Roca, Rosana Rodríguez, Francisco V. Fernández, Montserrat Nafría:
A Model Parameter Extraction Methodology Including Time-Dependent Variability for Circuit Reliability Simulation. SMACD 2018: 53-56 - 2017
- [c4]Pablo Martín-Lloret, Antonio Toro-Frías, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs. ISCAS 2017: 1-4 - [c3]Pablo Martín-Lloret, Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría:
CASE: A reliability simulation tool for analog ICs. SMACD 2017: 1-4 - [c2]Antonio Toro-Frías, Pablo Martín-Lloret, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría:
Including a stochastic model of aging in a reliability simulation flow. SMACD 2017: 1-4 - 2016
- [j1]Antonio Toro-Frías, Pablo Martín-Lloret, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández:
Reliability simulation for analog ICs: Goals, solutions, and challenges. Integr. 55: 341-348 (2016) - 2011
- [c1]Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Layout-aware Pareto fronts of electronic circuits. ECCTD 2011: 345-348
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