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Patrick Groeneveld
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2020 – today
- 2022
- [c27]Patrick R. Groeneveld:
From Hard-Coded Heuristics to ML-Driven Optimization: New Frontiers for EDA. ISPD 2022: 53 - 2021
- [c26]Patrick Groeneveld, Michael James, Vladimir Kibardin, Ilya Sharapov, Marvin Tom, Leo Wang:
ISPD 2021 Wafer-Scale Physics Modeling Contest: A New Frontier for Partitioning, Placement and Routing. ISPD 2021: 143-147 - 2020
- [c25]Michael James, Marvin Tom, Patrick Groeneveld, Vladimir Kibardin:
ISPD 2020 Physical Mapping of Neural Networks on a Wafer-Scale Deep Learning Accelerator. ISPD 2020: 145-149 - [c24]Patrick Groeneveld:
Wafer scale interconnect and pathfinding for machine learning hardware (invited). SLIP 2020: 7
2010 – 2019
- 2019
- [c23]Patrick Groeneveld:
Session details: Cyber-Physical Systems. ISPD 2019 - 2016
- [c22]Patrick R. Groeneveld:
Optimizing for Power, Speed, Cost and Emissions in Automotive Drivetrains. ISPD 2016: 35 - [c21]Patrick R. Groeneveld:
Trailblazing Physical Design Flows: Ralph Otten's Impact on Design Automation. ISPD 2016: 113 - 2012
- [c20]Patrick Groeneveld:
Reality-driven physical synthesis. ISPD 2012: 175-178 - [e3]Patrick Groeneveld, Donatella Sciuto, Soha Hassoun:
The 49th Annual Design Automation Conference 2012, DAC '12, San Francisco, CA, USA, June 3-7, 2012. ACM 2012, ISBN 978-1-4503-1199-1 [contents] - 2010
- [c19]Patrick Groeneveld:
Going with the flow: bridging the gap between theory and practice in physical design. ISPD 2010: 3 - [c18]Patrick Groeneveld, Louis Scheffer, Dirk Stroobandt:
SLIP: 10 years ago and 10 years from now. SLIP 2010: 67-68
2000 – 2009
- 2009
- [c17]Patrick Groeneveld, Rob A. Rutenbar, Jed W. Pitera, Erik C. Carlson, Jinsong Chen:
Oil fields, hedge funds, and drugs. DAC 2009: 416-417 - 2006
- [c16]Chris Bartels, Jos Huisken, Kees Goossens, Patrick Groeneveld, Jef L. van Meerbergen:
Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip. VLSI-SoC 2006: 80-85 - [c15]Arno Moonen, Chris Bartels, Marco Bekooij, René van den Berg, Harpreet Bhullar, Kees Goossens, Patrick Groeneveld, Jos Huisken, Jef L. van Meerbergen:
Comparison of an Æthereal Network on Chip and Traditional Interconnects - Two Case Studies. VLSI-SoC (Selected Papers) 2006: 317-336 - 2005
- [c14]Jurjen Westra, Patrick Groeneveld:
Post-Placement Pin Optimiztion. ISVLSI 2005: 238-243 - [c13]Jurjen Westra, Patrick Groeneveld:
Towards Integration of Quadratic Placement and Pin Assignment. ISVLSI 2005: 284-286 - [c12]Jurjen Westra, Patrick Groeneveld:
Is probabilistic congestion estimation worthwhile? SLIP 2005: 99-106 - [e2]Patrick Groeneveld, Louis Scheffer:
Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005. ACM 2005, ISBN 1-59593-021-3 [contents] - 2004
- [c11]Francky Catthoor, Andrea Cuomo, Grant Martin, Patrick Groeneveld, Rudy Lauwereins, Karen Maex, Patrick van de Steeg, Ron Wilson:
How Can System-Level Design Solve the Interconnect Technology Scaling Problem? DATE 2004: 332-339 - [c10]Jurjen Westra, Chris Bartels, Patrick Groeneveld:
Probabilistic congestion prediction. ISPD 2004: 204-209 - [c9]Patrick Groeneveld:
Physical Synthesis: its struggle with Moore's law. MBMV 2004: 21-23 - [e1]Charles J. Alpert, Patrick Groeneveld:
Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004. ACM 2004, ISBN 1-58113-817-2 [contents] - 2003
- [c8]Andrew B. Kahng, Shekhar Borkar, John M. Cohn, Antun Domic, Patrick Groeneveld, Louis Scheffer, Jean-Pierre Schoellkopf:
Nanometer design: place your bets. DAC 2003: 546-547 - 2002
- [c7]Andrew B. Kahng, Ronald Collett, Patrick Groeneveld, Lavi Lev, Nancy Nettleton, Paul K. Rodman, Lambert van den Hoven:
Tools or users: which is the bigger bottleneck? DAC 2002: 76-77 - [c6]Ralph H. J. M. Otten, Raul Camposano, Patrick Groeneveld:
Design Automation for Deepsubmicron: Present and Future. DATE 2002: 650-657 - [c5]Patrick Groeneveld:
Physical Design Challenges for Billion Transistor Chips. ICCD 2002: 78-83 - 2001
- [c4]Rob A. Rutenbar, Olivier Coudert, Patrick Groeneveld, Jürgen Koehl, Scott Peterson, Vivek Raghavan, Naresh Soni:
Automatic Hierarchical Design: Fantasy or Reality? (Panel). ICCAD 2001: 656 - 2000
- [c3]Raul Camposano, Olivier Coudert, Patrick Groeneveld, Leon Stok, Ralph H. J. M. Otten:
Timing closure: the solution and its problems. ASP-DAC 2000: 359-364 - [c2]Raul Camposano, Jacob Greidinger, Patrick Groeneveld, Michael Jackson, Lawrence T. Pileggi, Louis Scheffer:
Design closure (panel session): hope or hype? DAC 2000: 176-177 - [c1]Patrick Groeneveld, Jacob Greidinger, J. George Janac, Wilm E. Donath:
The right floorplanning formulations for future chip implementation methodologies (panel discussion - title only). ISPD 2000: 214
1990 – 1999
- 1993
- [j3]Patrick Groeneveld:
Necessary and sufficient conditions for the routability of classical channels. Integr. 16(1): 59-74 (1993) - 1990
- [j2]Patrick Groeneveld:
A multiple layer contour-based gridless channel router. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(12): 1278-1288 (1990)
1980 – 1989
- 1989
- [j1]Patrick Groeneveld:
Wire ordering for detailed routing. IEEE Des. Test 6(6): 6-17 (1989)
Coauthor Index
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