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S. Murra

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2025
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A. Cortiula, D. Scubla, S. Murra, Davide Menin, Andrea Bandiziol, Francesco Driussi, Pierpaolo Palestri:
Design and Simulation of a 64 Gb/s PAM-4 Wireline Receiver in 22 nm CMOS. PRIME 2025: 1-4

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