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ORCIDMitsuya Fukazawa
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2020 – today
- 2023
[c8]Mitsuya Fukazawa, Tetsuo Matsui:
A 24-OSR to Simplify Anti-Aliasing Filter 2MHz-BW 83dB-DR 3rd-order DT-DSM using FIA-Based Integrator and Noise-Shaping SAR Combined Digital Noise-Coupling Quantizer. VLSI Technology and Circuits 2023: 1-2- 2021
- [j4]Mitsuya Fukazawa
, Takashi Oshima, Masaki Fujiwara, Katsuki Tateyama, Atsushi Ochi, Alsubaie Raed, Tetsuo Matsui:
A CT 2-2 MASH ΔΣ ADC With Multi-Rate LMS-Based Background Calibration and Input-Insensitive Quantization-Error Extraction. IEEE J. Solid State Circuits 56(10): 2943-2955 (2021) - 2020
- [c7]Koji Yoichi, Sugako Otani, Kazutoshi Tsuda, Naoya Tokimoto, Hideki Kamegawa, Yoshihisa Satou, Shioto Tanaka, Hideki Otsu, Mitsuru Hiraki, Masao Ito, Mitsuya Fukazawa, Hiroyuki Kondo:
A High-Precision Analog Front End Integrated in a 32bit Microcontroller for Industrial Sensing Applications. A-SSCC 2020: 1-4 - [c6]Mitsuya Fukazawa, Takashi Oshima, Masaki Fujiwara, Katsuki Tateyama, Alsubaie Raed, Masao Ito, Tetsuya Matsumoto, Tetsuo Matsui:
9.7 Background Multi-Rate LMS Calibration Circuit for 15MHz-BW 74dB-DR CT 2-2 MASH ΔΣ ADC in 28nm CMOS. ISSCC 2020: 166-168
2000 – 2009
- 2009
- [j3]Mitsuya Fukazawa, Masanori Kurimoto, Rei Akiyama, Hidehiro Takata, Makoto Nagata:
Experimental Evaluation of Dynamic Power Supply Noise and Logical Failures in Microprocessor Operations. IEICE Trans. Electron. 92-C(4): 475-482 (2009) - 2007
- [c5]Mitsuya Fukazawa, Tetsuro Matsuno, Toshifumi Uemura, Rei Akiyama, Tetsuya Kagemoto, Hiroshi Makino, Hidehiro Takata, Makoto Nagata:
Fine-Grained In-Circuit Continuous-Time Probing Technique of Dynamic Supply Variations in SoCs. ISSCC 2007: 288-603 - 2006
- [j2]Kenji Shimazaki, Makoto Nagata, Mitsuya Fukazawa, Shingo Miyahara, Masaaki Hirata, Kazuhiro Satoh, Hiroyuki Tsujikawa:
An Integrated Timing and Dynamic Supply Noise Verification for Multi-10-Million Gate SoC Designs. IEICE Trans. Electron. 89-C(11): 1535-1543 (2006) - [j1]Mitsuya Fukazawa, Makoto Nagata:
Measurement-Based Analysis of Delay Variation Induced by Dynamic Power Supply Noise. IEICE Trans. Electron. 89-C(11): 1559-1566 (2006) - [c4]Mitsuya Fukazawa, Koichiro Noguchi, Makoto Nagata, Kazuo Taki:
A built-in power supply noise probe for digital LSIs. ASP-DAC 2006: 106-107 - [c3]Mitsuya Fukazawa, Makoto Nagata:
Delay Variation Analysis in Consideration of Dynamic Power Supply Noise Waveform. CICC 2006: 865-868 - 2005
- [c2]Kenji Shimazaki, Mitsuya Fukazawa, Makoto Nagata, Shingo Miyahara, Masaaki Hirata, Kazuhiro Satoh, Hiroyuki Tsujikawa:
An integrated timing and dynamic supply noise verification for nano-meter CMOS SoC designs. CICC 2005: 31-34 - [c1]Yoshihide Komatsu, Koichiro Ishibashi, Masaharu Yamamoto, Toshiro Tsukada, Kenji Shimazaki, Mitsuya Fukazawa, Makoto Nagata:
Substrate-noise and random-fluctuations reduction with self-adjusted forward body bias. CICC 2005: 35-38
Coauthor Index
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