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Peter R. Cappello
Person information
- affiliation: University of California, Santa Barbara, USA
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2010 – 2019
- 2018
- [p1]Peter R. Cappello, Christopher James Coakley:
A Development and Deployment Framework for Distributed Branch-and-Bound. Handbook of Approximation Algorithms and Metaheuristics (1) 2018: 629-640
2000 – 2009
- 2008
- [j29]Peter R. Cappello:
Application-specific Processor Architecture: Then and Now. J. Signal Process. Syst. 53(1-2): 197-215 (2008) - 2007
- [r1]Peter R. Cappello, Christopher James Coakley:
A Development and Deployment Framework for Distributed Branch and Bound. Handbook of Approximation Algorithms and Metaheuristics 2007 - 2006
- [c27]Peter R. Cappello:
Multicore processors as Array Processors: Research Opportunities. ASAP 2006: 169-172 - 2005
- [j28]Michael O. Neary, Peter R. Cappello:
Advanced eager scheduling for Java-based adaptive parallel computing. Concurr. Pract. Exp. 17(7-8): 797-819 (2005) - [c26]Peter R. Cappello, Christopher James Coakley:
JICOS: A Java-Centric Network Computing Service. IASTED PDCS 2005: 510-515 - 2002
- [j27]Peter R. Cappello, Dimitros Mourloukos:
CX: A scalable, robust network for parallel computing. Sci. Program. 10(2): 159-171 (2002) - [c25]Peter R. Cappello, Ömer Egecioglu:
Automatic Processor Lower Bound Formulas for Array Computations. ISPAN 2002: 59-64 - [c24]Michael O. Neary, Peter R. Cappello:
Advanced eager scheduling for Java-based adaptively parallel computing. Java Grande 2002: 56-65 - 2001
- [c23]Peter R. Cappello, Dimitros Mourloukos:
A scalable, robust network for parallel computing. Java Grande 2001: 78-86 - 2000
- [j26]Michael O. Neary, Sean P. Brydon, Paul Kmiec, Sami Rollins, Peter R. Cappello:
Javelin++: scalability issues in global computing. Concurr. Pract. Exp. 12(8): 727-753 (2000) - [j25]Peter R. Cappello, Ömer Egecioglu, Chris J. Scheiman:
Processor-time-optimal systolic arrays. Parallel Algorithms Appl. 15(3-4): 167-199 (2000) - [c22]Michael O. Neary, Alan Phipps, Steven Richman, Peter R. Cappello:
Javelin 2.0: Java-Based Parallel Computing on the Internet. Euro-Par 2000: 1231-1238 - [c21]Michael O. Neary, Peter R. Cappello:
Internet-Based TSP Computation with Javelin++. ICPP Workshops 2000: 137-144
1990 – 1999
- 1999
- [j24]Michael O. Neary, Bernd O. Christiansen, Peter R. Cappello, Klaus E. Schauser:
Javelin: Parallel computing on the internet. Future Gener. Comput. Syst. 15(5-6): 659-674 (1999) - [c20]Michael O. Neary, Sean P. Brydon, Paul Kmiec, Sami Rollins, Peter R. Cappello:
Javelin++: Scalability Issues in Global Computing. Java Grande 1999: 171-180 - 1998
- [j23]Peter R. Cappello, Ömer Egecioglu:
Processor Lower Bound Formulas for Array Computations and Parametric Diophantine Systems. Int. J. Found. Comput. Sci. 9(4): 351-375 (1998) - [c19]Peter R. Cappello, Ömer Egecioglu:
Processor Lower Bound Formulas for Array Computations and Parametric Diophantine Systems. IPPS/SPDP 1998: 105-109 - 1997
- [j22]Bernd O. Christiansen, Peter R. Cappello, Mihai F. Ionescu, Michael O. Neary, Klaus E. Schauser, Daniel Wu:
Javelin: Internet-based Parallel Computing using Java. Concurr. Pract. Exp. 9(11): 1139-1160 (1997) - 1996
- [j21]Chris J. Scheiman, Peter R. Cappello:
A Processor-Time-Minimal Design for 3D Rectilinear Mesh Algorithms. Parallel Process. Lett. 6(4): 539-550 (1996) - 1995
- [j20]Yoav Yaacoby, Peter R. Cappello:
Converting affine recurrence equations to quasi-uniform recurrence equations. J. VLSI Signal Process. 11(1-2): 113-131 (1995) - [c18]Chris J. Scheiman, Peter R. Cappello:
A Processor-Time-Minimal Schedule for 3D Rectilinear Mesh Algorithms. ASAP 1995: 26-33 - 1994
- [j19]Yoav Yaacoby, Peter R. Cappello:
Bounded Broadcast in Systolic Arrays. Int. J. High Speed Comput. 6(2): 223-237 (1994) - [j18]John L. Brune, Peter R. Cappello:
Implementing the 3D Alternating Direction Method on the Hypercube. J. Parallel Distributed Comput. 23(3): 411-417 (1994) - [j17]Chris J. Scheiman, Peter R. Cappello:
A Period-Processor-Time-Minimal Schedule for Cubical Mesh Algorithms. IEEE Trans. Parallel Distributed Syst. 5(3): 274-280 (1994) - [c17]Chris J. Scheiman, Peter R. Cappello:
A processor-time-minimal schedule for the standard tensor product algorithm. ASAP 1994: 176-187 - 1993
- [j16]Çetin Kaya Koç
, Peter R. Cappello:
Systolic Arrays for Integer Chinese Remaindering. Parallel Comput. 19(11): 1303-1311 (1993) - [c16]Chris J. Scheiman, Peter R. Cappello:
A period-processor-time-minimal schedule for cubical mesh algorithms. ASAP 1993: 261-272 - 1992
- [j15]Peter R. Cappello, Willard L. Miranker:
Systolic Super Summation with Reduced Hardware. IEEE Trans. Computers 41(3): 339-342 (1992) - [j14]Peter R. Cappello:
A Processor-Time-Minimal Systolic Array for Cubical Mesh Algorithms. IEEE Trans. Parallel Distributed Syst. 3(1): 4-13 (1992) - [j13]Chris J. Scheiman, Peter R. Cappello:
A Processor-Time-Minimal Systolic Array for Transitive Closure. IEEE Trans. Parallel Distributed Syst. 3(3): 257-269 (1992) - [j12]Peter R. Cappello:
Correction to "A Processor-Time-Minimal Systolic Array for Cubical Mesh Algorithms". IEEE Trans. Parallel Distributed Syst. 3(3): 384 (1992) - 1991
- [j11]Çetin Kaya Koç
, Peter R. Cappello, Efstratios Gallopoulos:
Decomposing polynomial interpolation for systolic arrays. Int. J. Comput. Math. 38(3-4): 291-239 (1991) - [c15]Chris J. Scheiman, Peter R. Cappello:
A period-processor-time-minimal systolic array for cubical mesh algorithms. SPDP 1991: 648-655 - 1990
- [j10]Peter R. Cappello, Efstratios Gallopoulos, Çetin Kaya Koç
:
Systolic computation of interpolating polynomials. Computing 45(2): 95-117 (1990) - [j9]Cheng-Wen Wu
, Peter R. Cappello:
Easily Testable Iterative Logic Arrays. IEEE Trans. Computers 39(5): 640-652 (1990) - [c14]Chris J. Scheiman, Peter R. Cappello:
A processor-time minimal systolic array for transitive closure. ASAP 1990: 19-30
1980 – 1989
- 1989
- [j8]Bradley R. Engstrom, Peter R. Cappello:
The SDEF Programming System. J. Parallel Distributed Comput. 7(2): 201-231 (1989) - [j7]Yoav Yaacoby, Peter R. Cappello:
Scheduling a system of nonsingular affine recurrence equations onto a processor array. J. VLSI Signal Process. 1(2): 115-125 (1989) - [c13]Çetin Kaya Koç, Peter R. Cappello:
Systolic arrays for integer Chinese remaindering. IEEE Symposium on Computer Arithmetic 1989: 216-223 - 1988
- [j6]Peter R. Cappello, Willard L. Miranker:
Systolic Super Summation. IEEE Trans. Computers 37(6): 657-677 (1988) - [j5]Cheng-Wen Wu
, Peter R. Cappello:
Application-specific CAD of VLSI second-order sections. IEEE Trans. Acoust. Speech Signal Process. 36(5): 813-825 (1988) - [j4]Grant A. Davidson, Peter R. Cappello, Allen Gersho:
Systolic architectures for vector quantization. IEEE Trans. Acoust. Speech Signal Process. 36(10): 1651-1664 (1988) - [c12]Yoav Yaacoby, Peter R. Cappello:
Converting Affine Recurrence Equations to Quasi-Uniform Recurrence Equations. AWOC 1988: 319-328 - [c11]John L. Bruno, Peter R. Cappello:
Implementing the beam and warming method on the hypercube. C³P 1988: 1073-1087 - 1987
- [j3]Peter R. Cappello:
Gaussian Elimination on a Hypercube Automaton. J. Parallel Distributed Comput. 4(3): 288-308 (1987) - [j2]Peter R. Cappello, Cheng-Wen Wu
:
Computer-aided design of VLSI FIR filters. Proc. IEEE 75(9): 1260-1271 (1987) - [c10]Cheng-Wen Wu, Peter R. Cappello:
Application-Specific CAD of High-Throughout IIR Filters. COMPCON 1987: 302-305 - [c9]Cheng-Wen Wu, Peter R. Cappello:
Computer-aided design of VLSI second-order sections. ICASSP 1987: 1907-1910 - [c8]Bradley R. Engstrom, Peter R. Cappello:
The SDEF Systolic Programming System. ICPP 1987: 645-652 - 1986
- [c7]Peter R. Cappello, Grant A. Davidson, Allen Gersho, Çetin Kaya Koç, V. Srinivasa Somayazulu:
A systolic vector quantization processor for real-time speech coding. ICASSP 1986: 2143-2146 - 1985
- [c6]Peter R. Cappello:
Towards an FIR filter tissue. ICASSP 1985: 276-279 - [c5]Peter R. Cappello:
A Mesh Automaton for Solving Dense Linear Systems. ICPP 1985: 418-425 - 1984
- [c4]Peter R. Cappello, Kenneth Steiglitz:
A fast tally structure and applications to signal processing. ICASSP 1984: 343-346 - 1983
- [j1]Peter R. Cappello, Kenneth Steiglitz:
A VLSI Layout for a Pipelined Dadda Multiplier. ACM Trans. Comput. Syst. 1(2): 157-174 (1983) - [c3]Peter R. Cappello, Andrea S. LaPaugh, Kenneth Steiglitz:
Optimal choice of intermediate latching to maximize throughput in VLSI circuits. ICASSP 1983: 935-938 - [c2]Peter R. Cappello, Kenneth Steiglitz:
Unifying VLSI Array Designs with Geometric Transformations. ICPP 1983: 448-457 - 1981
- [c1]Peter R. Cappello, Kenneth Steiglitz:
Some intractable problems in digital signal processing. ICASSP 1981: 43-46
Coauthor Index
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