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2010 – 2019
- 2015
[j1]Yung-Hui Chung, Meng-Hsuan Wu, Hung-Sung Li:
A 12-bit 8.47-fJ/Conversion-Step Capacitor-Swapping SAR ADC in 110-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(1): 10-18 (2015)- 2013
- [c5]Yung-Hui Chung, Meng-Hsuan Wu, Hung-Sung Li:
A 24μW 12b 1MS/s 68.3dB SNDR SAR ADC with two-step decision DAC switching. CICC 2013: 1-4 - [c4]Jie-Wei Lai, Chi-Hsueh Wang, Kaipon Kao, Anson Lin, Yi-Hsien Cho, Lan-chou Cho, Meng-Hsiung Hung, Xin-Yu Shih
, Che-Min Lin, Sheng-Hong Yan, Yuan-Hung Chung, Paul C. P. Liang, Guang-Kaai Dehng, Hung-Sung Li, George Chien, Robert Bogdan Staszewski:
A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS. ISSCC 2013: 342-343
2000 – 2009
- 2009
- [c3]Chi-Cheng Ju, Tsu-Ming Liu, Chih-Chieh Yang, Shih-Hung Lin, Kuo-Pin Lan, Chien-Hua Wu, Ting-Hsun Wei, Chi-Chin Lien, Jiun-Yuan Wu, Chih-Hao Hsiao, Te-Wei Chen, Yeh-Lin Chu, Guan-Yi Lin, Yung-Chang Chang, Kung-Sheng Lin, Chih-Ming Wang, Hue-Min Lin, Chia-Yun Cheng, Chun-Chia Chen, Chien-Hung Lin, Yung-Teng Lin, Shang-Ming Lee, Ya-Ching Yang, Yu-Lun Cheng, Chen-Chia Lee, Ming-Shiang Lai, Wen-Hua Wu, Ted Hu, Chao-Wei Tseng, Chen-Yu Hsiao, Wei-Liang Lee, Bo-Jiun Chen, Pao-Cheng Chiu, Shang-Ping Chen, Kun-Hsien Li, Kuan-Hua Chao, Chien-Ming Chen, Chuan-Cheng Hsiao, Jeffrey Ju, Wei-Hung Huang, Chi-Hui Wang, Hung-Sung Li, Evan Su, Joe Chen:
A multi-format Blu-ray player SoC in 90nm CMOS. ISSCC 2009: 152-153 - [c2]Yan-Bin Luo, Ping Chen, Qui-Ting Chen, Chih-Yong Wang, Chan-Hao Chang, Szu-Jui Fu, Chien-Ming Chen, Hung-Sung Li:
A 250Mb/s-to-3.4Gb/s HDMI receiver with adaptive loop updating frequencies and an adaptive equalizer. ISSCC 2009: 190-191 - 2008
- [c1]Kang-Wei Hsueh, Yu-Kai Chou, Yu-Hsuan Tu, Yi-Fu Chen, Ya-Lun Yang, Hung-Sung Li:
A 1V 11b 200MS/s Pipelined ADC with Digital Background Calibration in 65nm CMOS. ISSCC 2008: 546-547
Coauthor Index
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