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ORCIDRafael Ruiz-Sautua
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2000 – 2009
- 2009
[j5]María C. Molina, Rafael Ruiz-Sautua, Alberto A. Del Barrio
, Jose Manuel Mendias:
Subword Switching Activity Minimization to Optimize Dynamic Power Consumption. IEEE Des. Test Comput. 26(4): 68-77 (2009)- [j4]María C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, José M. Mendías:
Performance-driven scheduling of behavioural specifications. Integr. 42(3): 294-303 (2009) - [j3]María C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, Román Hermida:
Frequent-Pattern-Guided Multilevel Decomposition of Behavioral Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(1): 60-73 (2009) - 2008
- [c9]Pedro Garcia-Repetto, María C. Molina, Rafael Ruiz-Sautua, Guillermo Botella Juan:
Exploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits. DSD 2008: 464-471 - 2007
- [j2]Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias:
Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(9): 1589-1601 (2007) - [c8]María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida:
Area optimization of multi-cycle operators in high-level synthesis. DATE 2007: 449-454 - [i1]Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida:
Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis. CoRR abs/0710.4801 (2007) - 2006
- [j1]María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida:
Bitwise scheduling to balance the computational cost of behavioral specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(1): 31-46 (2006) - [c7]Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida:
Pre-synthesis optimization of multiplications to improve circuit performance. DATE 2006: 1306-1311 - 2005
- [c6]Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida:
Arrival time aware scheduling to minimize clock cycle length. ASP-DAC 2005: 1018-1021 - [c5]Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida:
Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis. DATE 2005: 1252-1257 - [c4]Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias, Román Hermida:
Performance-driven read-after-write dependencies softening in high-level synthesis. ICCAD 2005: 7-12 - 2004
- [c3]María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida:
Behavioural Bitwise Scheduling Based on Computational Effort Balancing. DATE 2004: 684-685 - [c2]María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida:
Behavioural Scheduling to Balance the Bit-Level Computational Effort. ISVLSI 2004: 99-104 - 2003
- [c1]María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida:
Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis. PATMOS 2003: 617-627
Coauthor Index
aka: José M. Mendías
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