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2020 – today
- 2024
[j23]Liming Xiu:
From Space-Central to Space-Time Balanced: A Perspective for Moore's Law 2.0 and a Holistic Paradigm for Emergence [Perspectives]. IEEE Signal Process. Mag. 41(4): 10-18 (2024)- [j22]Xiangye Wei
, Liming Xiu, Yimao Cai:
A Perspective of Using Frequency-Mixing as Entropy in Random Number Generation for Portable Hardware Cybersecurity IP. IEEE Trans. Inf. Forensics Secur. 19: 320-333 (2024) - 2023
- [j21]Xiangye Wei, Liming Xiu:
A VLSI Digital Circuit Platform for Performing Deterministic Stochastic Computing in the Time Dimension Using Fraction Operations on Rational Numbers. IEEE Trans. Emerg. Top. Comput. 11(1): 194-207 (2023) - [j20]Yiwen Li, Liming Xiu, Xiangye Wei, Shuisheng Lin, Chenglong Li, Hui Zhang:
Using All-Digital On-Chip Syntonistor to Compensate Clock Frequency Error in Network Time Synchronization for Accuracy Reaching to Sub-µs Range. IEEE Trans. Ind. Electron. 70(10): 9981-9991 (2023) - 2022
- [j19]Xiangye Wei, Liming Xiu:
A New Perspective of Flexible Clocking Ideology for Driving and Devising Circuits in Emerging Resource-Constrained Applications. IEEE Access 10: 25767-25785 (2022) - [c8]Xiangye Wei, Liming Xiu:
A New Perspective of Inscribing Temporal Encryption on Spatial MPV Imprints for PUF Design. SOCC 2022: 1-6 - 2021
- [j18]Chenglong Li, Shuisheng Lin, Yiwen Li, Hui Zhang, Xiangye Wei, Liming Xiu:
A Method of Low-Cost Pure-Digital GPS Disciplined Clock for Improving Frequency Accuracy and Steering Frequency Through TAF-DPS Frequency Synthesizer. IEEE Trans. Instrum. Meas. 70: 1-10 (2021) - 2020
- [c7]Xiangye Wei, Liming Xiu:
An All Digital Highly Programable TAF-DPS Based True Random Number Generator Working on Principles of Frequency-Mixing and Frequency-Tracking. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j17]Liming Xiu, Xiangye Wei, Yuhai Ma:
A Full Digital Fractional-N TAF-FLL for Digital Applications: Demonstration of the Principle of a Frequency-Locked Loop Built on Time-Average-Frequency. IEEE Trans. Very Large Scale Integr. Syst. 27(3): 524-534 (2019) - [c6]Liming Xiu, Xiangye Wei:
A 0.02 Ppb/Step Wide Range DCXO Based on Time-Average-Frequency: Demonstration on FPGA. ISCAS 2019: 1-5 - 2017
- [j16]Liming Xiu, Pao-Lung Chen:
A Reconfigurable TAF-DPS Frequency Synthesizer on FPGA Achieving 2 ppb Frequency Granularity and Two-Cycle Switching Speed. IEEE Trans. Ind. Electron. 64(2): 1233-1240 (2017) - [c5]Liming Xiu:
All digital FPGA-implementable time-average-frequency direct period synthesis for IoT applications. ISCAS 2017: 1-4 - 2015
- [j15]Liming Xiu:
Direct Period Synthesis for Achieving Sub-PPM Frequency Resolution Through Time Average Frequency: The Principle, The Experimental Demonstration, and Its Application in Digital Communication. IEEE Trans. Very Large Scale Integr. Syst. 23(7): 1335-1344 (2015) - 2013
- [j14]Liming Xiu, Win-Ting Lin, Tsung-Ta Lee:
Flying-Adder Fractional Divider Based Integer-N PLL: 2nd Generation FAPLL as On-Chip Frequency Generator for SoC. IEEE J. Solid State Circuits 48(2): 441-455 (2013) - 2012
- [j13]Liming Xiu, Kun-Ho Lin, Ming Lin:
The Impact of Input-Mismatch on Flying-Adder Direct Period Synthesizer Output Jitter. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(9): 1942-1951 (2012) - 2011
- [j12]Liming Xiu, Ming Lin, Hong Jiang:
A Storage-Based Carry Randomization Technique for Spurs Reduction in Flying-Adder Frequency Synthesizer. IEEE Trans. Circuits Syst. II Express Briefs 58-II(6): 326-330 (2011) - 2010
- [j11]Ping Gui, Zheng Gao, Chen-Wei Huang, Liming Xiu:
The Effects of Flying-Adder Clocks on Digital-to-Analog Converters. IEEE Trans. Circuits Syst. II Express Briefs 57-II(1): 1-5 (2010) - [j10]Liming Xiu, Chen-Wei Huang, Ping Gui:
Analysis of Harmonic Energy Distribution Portfolio for Digital-to-Frequency Converters. IEEE Trans. Instrum. Meas. 59(10): 2770-2778 (2010) - [c4]Liming Xiu, Chen-Wei Huang, Ping Gui:
A comparative study between Fractional-N PLL and Flying-Adder PLL. ISCAS 2010: 237-240
2000 – 2009
- 2009
- [j9]Liming Xiu:
A Fast and Power-Area-Efficient Accumulator for Flying-Adder Frequency Synthesizer. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(11): 2439-2448 (2009) - [c3]Liming Xiu, Chen-Wei Huang, Ping Gui:
Simulation Study of Time-Average-Frequency based Clock Signal Driving Systems with Embedded Digital-to-Analog Converters. ISCAS 2009: 465-468 - [c2]Chen-Wei Huang, Ping Gui, Liming Xiu:
A Wide-tuning-range and Reduced-fractional-spurs Synthesizer Combining Sigma-Delta Fractional-N and Integer Flying-Adder Techniques. ISCAS 2009: 1377-1380 - 2008
- [j8]Liming Xiu:
A Novel DCXO Module for Clock Synchronization in MPEG2 Transport System. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(8): 2226-2237 (2008) - [j7]Liming Xiu:
A Flying-Adder PLL technique enabling novel approaches for video/graphic applications. IEEE Trans. Consumer Electron. 54(2): 591-599 (2008) - [c1]Mingjun Liu, Liming Xiu, Guangfeng Jia, Yuehui Chen:
Crack Fault Diagnosis Based on MEP Based Neural Network. ISCSCT (1) 2008: 635-639 - 2007
- [j6]Liming Xiu:
A "Flying-Adder" On-Chip Frequency Generator for Complex SoC Environment. IEEE Trans. Circuits Syst. II Express Briefs 54-II(12): 1067-1071 (2007) - 2005
- [j5]Liming Xiu, Zhihong You:
A "Flying-Adder" frequency synthesis architecture of reducing VCO stages. IEEE Trans. Very Large Scale Integr. Syst. 13(2): 201-210 (2005) - 2004
- [j4]Liming Xiu, Wen Li, J. Meiners, R. Padakanti:
A novel all-digital PLL with software adaptive filter. IEEE J. Solid State Circuits 39(3): 476-483 (2004) - 2003
- [j3]Liming Xiu, Zhihong You:
A new frequency synthesis method based on "flying-adder" architecture. IEEE Trans. Circuits Syst. II Express Briefs 50(3): 130-134 (2003) - 2002
- [j2]Liming Xiu, Zhihong You:
A "flying-adder" architecture of frequency and phase synthesis with scalability. IEEE Trans. Very Large Scale Integr. Syst. 10(5): 637-649 (2002) - 2000
- [j1]Hugh Mair, Liming Xiu:
An architecture of high-performance frequency and phase synthesis. IEEE J. Solid State Circuits 35(6): 835-846 (2000)
Coauthor Index
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