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Books and Theses
- 2015
[b1]Liangpeng Guo:
From MetroII to Metronomy, Designing Contract-based Function-Architecture Co-simulation Framework for Timing Verification of Cyber-Physical Systems. University of California, Berkeley, USA, 2015
Journal Articles
- 2013
- [j3]Abhijit Davare, Douglas Densmore, Liangpeng Guo, Roberto Passerone
, Alberto L. Sangiovanni-Vincentelli, Alena Simalatsar, Qi Zhu:
metroII: A design environment for cyber-physical systems. ACM Trans. Embed. Comput. Syst. 12(1s): 49:1-49:31 (2013) - 2010
- [j2]Marco Di Natale, Liangpeng Guo, Haibo Zeng, Alberto L. Sangiovanni-Vincentelli:
Synthesis of Multi-task Implementations of Simulink Models with Minimum Delays. IEEE Trans. Ind. Informatics 6(4): 637-651 (2010) - 2008
- [j1]Liangpeng Guo, Yici Cai, Qiang Zhou, Xianlong Hong:
Logic and Layout Aware Level Converter Optimization for Multiple Supply Voltage. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(8): 2084-2090 (2008)
Conference and Workshop Papers
- 2014
- [c7]Liangpeng Guo, Qi Zhu, Pierluigi Nuzzo, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli, Edward A. Lee:
Metronomy: A function-architecture co-simulation framework for timing verification of cyber-physical systems. CODES+ISSS 2014: 24:1-24:10 - 2013
- [c6]Hokeun Kim, Liangpeng Guo, Edward A. Lee, Alberto L. Sangiovanni-Vincentelli:
A tool integration approach for architectural exploration of aircraft electric power systems. CPSNA 2013: 38-43 - [c5]Liangpeng Guo, Alberto L. Sangiovanni-Vincentelli, Alessandro Pinto:
A complexity metric for concurrent finite state machine based embedded software. SIES 2013: 189-195 - 2012
- [c4]Alena Simalatsar, Liangpeng Guo, Marius Bozga, Roberto Passerone:
Integration of correct-by-construction BIP models into the MetroII design space exploration flow. ICCD 2012: 490-491 - 2010
- [c3]Yan Xu, Liangpeng Guo, Yougui Wang:
Income and Wealth Distributions in Money Exchange Models. ICEE 2010: 5195-5198 - 2008
- [c2]Liangpeng Guo, Yici Cai, Qiang Zhou, Le Kang, Xianlong Hong:
A novel performance driven power gating based on distributed sleep transistor network. ACM Great Lakes Symposium on VLSI 2008: 255-260 - 2007
- [c1]Liangpeng Guo, Yici Cai, Qiang Zhou, Xianlong Hong:
Logic and Layout Aware Voltage Island Generation for Low Power Design. ASP-DAC 2007: 666-671
Coauthor Index
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