![](https://dblp.org/img/logo.ua.320x120.png)
![](https://dblp.org/img/dropdown.dark.16x16.png)
![](https://dblp.org/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.org/img/search.dark.16x16.png)
![search dblp](https://dblp.org/img/search.dark.16x16.png)
default search action
Ali Sheikholeslami
Person information
Refine list
![note](https://dblp.org/img/note-mark.dark.12x12.png)
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
- [j46]Pierre Miasnikof
, Mohammad Bagherbeik, Ali Sheikholeslami:
Graph clustering with Boltzmann machines. Discret. Appl. Math. 343: 208-223 (2024) - [j45]Milad Haghi Kashani
, Hossein Shakiba
, Ali Sheikholeslami
:
A Low-Power High-BW PAM4 VCSEL Driver With Three-Tap FFE in 12-nm CMOS FinFET Process. IEEE J. Solid State Circuits 59(7): 1995-2004 (2024) - [j44]Mohammad Emami Meybodi
, Hossein Shakiba
, Ali Sheikholeslami
:
Analysis and Design of an Optimal Noise Estimation and Cancellation Filter in Wireline Communication. IEEE Open J. Circuits Syst. 5: 153-165 (2024) - [j43]Jeremy Cosson-Martin
, Jhoan Salinas
, Hossein Shakiba
, Ali Sheikholeslami
:
FBMC vs. PAM and DMT for High-Speed Wireline Communication. IEEE Open J. Circuits Syst. 5: 243-253 (2024) - 2023
- [j42]Milad Haghi Kashani
, Hossein Shakiba
, Ali Sheikholeslami
:
An Inductorless Optical Receiver Front-End Employing a High Gain-BW Product Differential Transimpedance Amplifier in 16-nm FinFET Process. IEEE Open J. Circuits Syst. 4: 36-49 (2023) - [j41]Sigeng Chen, Jeffrey S. Rosenthal, Aki Dote, Hirotaka Tamura, Ali Sheikholeslami:
Optimization via Rejection-Free Partial Neighbor Search. Stat. Comput. 33(6): 131 (2023) - [c51]Milad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami:
A 0.82pJ/b 50Gb/s PAM4 VCSEL Driver with 3-Tap Asymmetric FFE in 12nm CMOS FinFET Process. ESSCIRC 2023: 369-372 - [c50]Jeremy Cosson-Martin, Miad Laghaei, Hossein Shakiba, Ali Sheikholeslami:
Efficient PAPR Reduction for Discrete Multi-Tone Signalling in High-Speed Wireline Applications. MWSCAS 2023: 924-928 - [c49]Milad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami:
A 0.32pJ/b 90Gbps PAM4 Optical Receiver Front-End with Automatic Gain Control in 12nm CMOS FinFET. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j40]Milad Haghi Kashani
, Hossein Shakiba
, Ali Sheikholeslami
:
A Low-Noise High-Gain Broadband Transformer-Based Inverter-Based Transimpedance Amplifier. IEEE Open J. Circuits Syst. 3: 72-81 (2022) - [j39]Mohammad Emami Meybodi
, Hector Gomez, Yu-Chun Lu
, Hossein Shakiba
, Ali Sheikholeslami
:
Design and Implementation of an On-Demand Maximum-Likelihood Sequence Estimation (MLSE). IEEE Open J. Circuits Syst. 3: 97-108 (2022) - [j38]Jeremy Cosson-Martin
, Hossein Shakiba
, Ali Sheikholeslami
:
An Efficient Filter-Bank Multi-Carrier System for High-Speed Wireline Applications. IEEE Open J. Circuits Syst. 3: 147-159 (2022) - [c48]Mohammad Bagherbeik, Wentao Xu, Seyed Farzad Mousavi, Kouichi Kanda, Hirotaka Tamura, Ali Sheikholeslami:
MAQO: A Scalable Many-Core Annealer for Quadratic Optimization on a Stratix 10 FPGA. FPGA 2022: 155 - [c47]Mohammad Bagherbeik, Wentao Xu, Seyed Farzad Mousavi, Kouichi Kanda, Hirotaka Tamura, Ali Sheikholeslami:
MAQO: A Scalable Many-Core Annealer for Quadratic Optimization. VLSI Technology and Circuits 2022: 76-77 - [i1]Pierre Miasnikof, Mohammad Bagherbeik, Ali Sheikholeslami:
Graph clustering with Boltzmann machines. CoRR abs/2203.02471 (2022) - 2021
- [j37]Jeffrey S. Rosenthal
, Aki Dote, Keivan Dabiri, Hirotaka Tamura, Sigeng Chen, Ali Sheikholeslami:
Jump Markov chains and rejection-free Metropolis algorithms. Comput. Stat. 36(4): 2789-2811 (2021) - [j36]Jhoan Salinas
, Jeremy Cosson-Martin
, Miad Laghaei, Hossein Shakiba, Ali Sheikholeslami
:
Performance Comparison of Baseband Signaling and Discrete Multi-Tone for Wireline Communication. IEEE Open J. Circuits Syst. 2: 65-77 (2021) - [j35]Jeremy Cosson-Martin
, Hossein Shakiba
, Ali Sheikholeslami
:
Timing Recovery and Adaptive Equalization for Discrete Multi-Tone Signalling in Wireline Applications. IEEE Open J. Circuits Syst. 2: 856-868 (2021) - [c46]Mohammad Bagherbeik
, Ali Sheikholeslami:
Caching and Vectorization Schemes to Accelerate Local Search Algorithms for Assignment Problems. CEC 2021: 2549-2558 - [c45]Ali Sheikholeslami:
The Power of Parallelism in Stochastic Search for Global Optimum: Keynote Paper. ESSCIRC 2021: 36-42 - 2020
- [j34]Keivan Dabiri
, Mehrdad Malekmohammadi
, Ali Sheikholeslami
, Hirotaka Tamura:
Replica Exchange MCMC Hardware With Automatic Temperature Selection and Parallel Trial. IEEE Trans. Parallel Distributed Syst. 31(7): 1681-1692 (2020) - [c44]Mehrdad Malekmohammadi
, Keivan Dabiri, Joshua Mathews, Daryl Nazareth, Hirotaka Tamura, Ali Sheikholeslami:
A Hamiltonian Engine for Radiotherapy Optimization. EMBC 2020: 5085-5088 - [c43]Ali Sheikholeslami:
Keynote II: Digital Annealer: A Stochastic Search for Global Optimum. ISMVL 2020: xix - [c42]Mohammad Bagherbeik
, Parastoo Ashtari
, Seyed Farzad Mousavi
, Kouichi Kanda, Hirotaka Tamura
, Ali Sheikholeslami
:
A Permutational Boltzmann Machine with Parallel Tempering for Solving Combinatorial Optimization Problems. PPSN (1) 2020: 317-331
2010 – 2019
- 2019
- [c41]Danny Yoo, Mohammad Bagherbeik
, Wahid Rahman
, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki:
A 30Gb/s 2x Half-Baud-Rate CDR. CICC 2019: 1-4 - [c40]Mohammad Javad-Kalbasi, Keivan Dabiri, Shahrokh Valaee, Ali Sheikholeslami:
Digitally Annealed Solution for the Vertex Cover Problem with Application in Cyber Security. ICASSP 2019: 2642-2646 - [c39]Danny Yoo, Mohammad Bagherbeik
, Wahid Rahman
, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki:
A 36Gb/s Adaptive Baud-Rate CDR with CTLE and 1-Tap DFE in 28nm CMOS. ISSCC 2019: 126-128 - 2018
- [j33]Joshua Liang
, Ali Sheikholeslami, Hirotaka Tamura, Hisakatsu Yamaguchi:
On-Chip Jitter Measurement Using Jitter Injection in a 28 Gb/s PI-Based CDR. IEEE J. Solid State Circuits 53(3): 750-761 (2018) - [j32]Joshua Liang
, Ali Sheikholeslami
, Hirotaka Tamura, Yuuki Ogata, Hisakatsu Yamaguchi:
Loop Gain Adaptation for Optimum Jitter Tolerance in Digital CDRs. IEEE J. Solid State Circuits 53(9): 2696-2708 (2018) - 2017
- [j31]Wahid Rahman
, Danny Yoo, Joshua Liang
, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki, Hisakatsu Yamaguchi:
A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS. IEEE J. Solid State Circuits 52(12): 3517-3531 (2017) - [c38]Joshua Liang
, Ali Sheikholeslami, Hirotaka Tamura, Hisakatsu Yamaguchi:
Jitter injection for on-chip jitter measurement in PI-based CDRs. CICC 2017: 1-4 - [c37]Satoshi Matsubara, Hirotaka Tamura, Motomu Takatsu, Danny Yoo, Behraz Vatankhahghadim
, Hironobu Yamasaki, Toshiyuki Miyazawa, Sanroku Tsukamoto, Yasuhiro Watanabe, Kazuya Takemoto, Ali Sheikholeslami:
Ising-Model Optimizer with Parallel-Trial Bit-Sieve Engine. CISIS 2017: 432-438 - [c36]Wahid Rahman
, Danny Yoo, Joshua Liang
, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki, Hisakatsu Yamaguchi:
6.6 A 22.5-to-32Gb/s 3.2pJ/b referenceless baud-rate digital CDR with DFE and CTLE in 28nm CMOS. ISSCC 2017: 120-121 - [c35]Joshua Liang
, Ali Sheikholeslami, Hirotaka Tamura, Yuuki Ogata, Hisakatsu Yamaguchi:
6.7 A 28Gb/s digital CDR with adaptive loop gain for optimum jitter tolerance. ISSCC 2017: 122-123 - [c34]Ali Sheikholeslami:
Tutorials. ISSCC 2017: 498-499 - 2016
- [c33]Sayeh Sharifymoghaddam, Ali Sheikholeslami:
Low-Swing Signaling for FPGA Power Reduction (Abstract Only). FPGA 2016: 283 - 2015
- [j30]Joshua Liang
, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
On-Chip Measurement of Clock and Data Jitter With Sub-Picosecond Accuracy for 10 Gb/s Multilane CDRs. IEEE J. Solid State Circuits 50(4): 845-855 (2015) - [j29]Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A Reference-Less Single-Loop Half-Rate Binary CDR. IEEE J. Solid State Circuits 50(9): 2037-2047 (2015) - [j28]Aynaz Vatankhahghadim, W. Song, Ali Sheikholeslami:
A Variation-Tolerant MRAM-Backed-SRAM Cell for a Nonvolatile Dynamically Reconfigurable FPGA. IEEE Trans. Circuits Syst. II Express Briefs 62-II(6): 573-577 (2015) - [j27]Mohammad Sadegh Jalali, Clifford Ting, Joshua Liang
, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A 3x blind ADC-based CDR for a 20 dB loss channel. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(6): 1658-1667 (2015) - [c32]Aynaz Vatankhahghadim, Ali Sheikholeslami:
A Multi-level Cell for STT-MRAM with Biaxial Magnetic Tunnel Junction. ISMVL 2015: 158-163 - 2014
- [j26]Yunzhi Dong, William Yang, Richard Schreier, Ali Sheikholeslami, Sudhir Korrapati:
A Continuous-Time 0-3 MASH ADC Achieving 88 dB DR With 53 MHz BW in 28 nm CMOS. IEEE J. Solid State Circuits 49(12): 2868-2877 (2014) - [j25]Ravi Shivnaraine, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
An 8-11 Gb/s Reference-Less Bang-Bang CDR Enabled by "Phase Reset". IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(7): 2129-2138 (2014) - [j24]Aynaz Vatankhahghadim, Safeen Huda, Ali Sheikholeslami:
A Survey on Circuit Modeling of Spin-Transfer-Torque Magnetic Tunnel Junctions. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(9): 2634-2643 (2014) - [c31]Clifford Ting, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A blind ADC-based CDR with digital data interpolation and adaptive CTLE and DFE. CICC 2014: 1-4 - [c30]Yunzhi Dong, Richard Schreier, Wenhua Yang, Sudhir Korrapati, Ali Sheikholeslami:
29.2 A 235mW CT 0-3 MASH ADC achieving -167dBFS/Hz NSD with 53MHz BW. ISSCC 2014: 480-481 - [c29]Joshua Liang
, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
On-chip measurement of data jitter with sub-picosecond accuracy for 10Gb/s multilane CDRs. VLSIC 2014: 1-2 - 2013
- [j23]Clifford Ting, Joshua Liang
, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A Blind Baud-Rate ADC-Based CDR. IEEE J. Solid State Circuits 48(12): 3285-3295 (2013) - [j22]Safeen Huda, Ali Sheikholeslami:
A Novel STT-MRAM Cell With Disturbance-Free Read Operation. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(6): 1534-1547 (2013) - [c28]Mohammad Sadegh Jalali, Ravi Shivnaraine, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
An 8mW frequency detector for 10Gb/s half-rate CDR using clock phase selection. CICC 2013: 1-8 - [c27]Ali Sheikholeslami, Hirotaka Tamura:
Design metrics for blind ADC-based wireline receivers. CICC 2013: 1-8 - [c26]Clifford Ting, Joshua Liang
, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A blind baud-rate ADC-based CDR. ISSCC 2013: 122-123 - 2012
- [c25]Ken Chang, Tony Chan Carusone
, Ali Sheikholeslami, Bob Payne, Miki Moyal, John T. Stonick, Hisakatsu Yamaguchi:
10-40 Gb/s I/O design for data communications. ISSCC 2012: 502-503 - 2011
- [j21]Behrooz Abiri, Ali Sheikholeslami, Hirotaka Tamura, Masaya Kibune:
An Adaptation Engine for a 2x Blind ADC-Based CDR in 65 nm CMOS. IEEE J. Solid State Circuits 46(12): 3140-3149 (2011) - [c24]Behrooz Abiri, Ravi Shivnaraine, Ali Sheikholeslami, Hirotaka Tamura, Masaya Kibune:
A 1-to-6Gb/s phase-interpolator-based burst-mode CDR in 65nm CMOS. ISSCC 2011: 154-156 - [c23]Shayan Shahramian, Clifford Ting, Ali Sheikholeslami, Hirotaka Tamura, Masaya Kibune:
A pattern-guided adaptive equalizer in 65nm CMOS. ISSCC 2011: 354-356 - [c22]Behrooz Abiri, Ali Sheikholeslami, Hirotaka Tamura, Masaya Kibune:
A 5Gb/s adaptive DFE for 2x blind ADC-based CDR in 65nm CMOS. ISSCC 2011: 436-438 - [c21]Ali Sheikholeslami, Franz Dielacher
, Miki Moyal, Jafar Savoj, John T. Stonick, Takuji Yamamoto:
High-speed transceivers: Standards, challenges, and future. ISSCC 2011: 522-523 - 2010
- [j20]Oleksiy Tyshchenko, Ali Sheikholeslami, Hirotaka Tamura, Masaya Kibune, Hisakatsu Yamaguchi, Junji Ogawa:
A 5-Gb/s ADC-Based Feed-Forward CDR in 65 nm CMOS. IEEE J. Solid State Circuits 45(6): 1091-1098 (2010) - [c20]Tina Tahmoureszadeh, Siamak Sarvari, Ali Sheikholeslami, Hirotaka Tamura, Yasumoto Tomita, Masaya Kibune:
A combined anti-aliasing filter and 2-tap FFE in 65-nm CMOS for 2× blind 2-;10 Gb/s ADC-based receivers. CICC 2010: 1-4 - [c19]Oleksiy Tyshchenko, Ali Sheikholeslami, Hirotaka Tamura, Yasumoto Tomita, Hisakatsu Yamaguchi, Masaya Kibune, Takuji Yamamoto:
A fractional-sampling-rate ADC-based CDR with feedforward architecture in 65nm CMOS. ISSCC 2010: 166-167 - [c18]Hisakatsu Yamaguchi, Hirotaka Tamura, Yoshiyasu Doi, Yasumoto Tomita, Takayuki Hamada, Masaya Kibune, Shuhei Ohmoto, Keita Tateishi, Oleksiy Tyshchenko, Ali Sheikholeslami, Tomokazu Higuchi, Junji Ogawa, Tamio Saito, Hideki Ishida, Kohtaroh Gotoh:
A 5Gb/s transceiver with an ADC-based feedforward CDR and CMA adaptive equalizer in 65nm CMOS. ISSCC 2010: 168-169 - [c17]David Halupka, Safeen Huda, William Song, Ali Sheikholeslami, Koji Tsunoda, Chikako Yoshida, Masaki Aoki:
Negative-resistance read and write schemes for STT-MRAM in 0.13µm CMOS. ISSCC 2010: 256-257
2000 – 2009
- 2009
- [j19]Khalil Gorgani Firouzjah
, Ali Sheikholeslami:
A current independent method based on synchronized voltage measurement for fault location on transmission lines. Simul. Model. Pract. Theory 17(4): 692-707 (2009) - [j18]Khalil Gorgani Firouzjah
, Ali Sheikholeslami, Mohammad Reza Karami Mollaei, F. Heydari:
A predictive current control method for shunt active filter with windowing based wavelet transform in harmonic detection. Simul. Model. Pract. Theory 17(5): 883-896 (2009) - [c16]Ali Sheikholeslami:
Multi-level Signaling for Chip-to-Chip and Backplane Communication (A Tutorial). ISMVL 2009: 203-207 - [c15]Ali Sheikholeslami, Robert Payne:
Will ADCs overtake binary frontends in backplane signaling? ISSCC 2009: 514 - 2008
- [j17]Oleksiy Tyshchenko, Ali Sheikholeslami:
Match Sensing Using Match-Line Stability in Content-Addressable Memories (CAM). IEEE J. Solid State Circuits 43(9): 1972-1981 (2008) - [j16]Marcus van Ierssel, Hisakatsu Yamaguchi, Ali Sheikholeslami, Hirotaka Tamura, William W. Walker:
Event-Driven Modeling of CDR Jitter Induced by Power-Supply Noise, Finite Decision-Circuit Bandwidth, and Channel ISI. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(5): 1306-1315 (2008) - 2007
- [j15]Marcus van Ierssel, Ali Sheikholeslami, Hirotaka Tamura, William W. Walker:
A 3.2 Gb/s CDR Using Semi-Blind Oversampling to Achieve High Jitter Tolerance. IEEE J. Solid State Circuits 42(10): 2224-2234 (2007) - [j14]David Halupka, Alireza Seyed Rabi, Parham Aarabi, Ali Sheikholeslami:
Low-Power Dual-Microphone Speech Enhancement Using Field Programmable Gate Arrays. IEEE Trans. Signal Process. 55(7-1): 3526-3535 (2007) - 2006
- [j13]Kostas Pagiamtzis, Ali Sheikholeslami:
Content-addressable memory (CAM) circuits and architectures: a tutorial and survey. IEEE J. Solid State Circuits 41(3): 712-727 (2006) - [j12]Duy Cuong Nguyen, David Halupka, Parham Aarabi, Ali Sheikholeslami:
Real-time face detection and lip feature extraction using field-programmable gate arrays. IEEE Trans. Syst. Man Cybern. Part B 36(4): 902-912 (2006) - [j11]Yadollah Eslami, Ali Sheikholeslami, P. Glenn Gulak, Shoichi Masui, Kenji Mukaida:
An area-efficient universal cryptography processor for smart cards. IEEE Trans. Very Large Scale Integr. Syst. 14(1): 43-56 (2006) - [c14]Ricky Yuen, Marcus van Ierssel, Ali Sheikholeslami, William W. Walker, Hirotaka Tamura:
A 5Gb/s Transmitter with Reflection Cancellation for Backplane Transceivers. CICC 2006: 413-416 - [c13]Marcus van Ierssel, Ali Sheikholeslami, Hirotaka Tamura, William W. Walker:
A 3.2Gb/s Semi-Blind-Oversampling CDR. ISSCC 2006: 1304-1313 - 2005
- [j10]David Halupka, Nebu John Mathai, Parham Aarabi, Ali Sheikholeslami:
Robust sound localization in 0.18 µm CMOS. IEEE Trans. Signal Process. 53(6): 2243-2250 (2005) - [c12]Kostas Pagiamtzis, Ali Sheikholeslami:
Using cache to reduce power in content-addressable memories (CAMs). CICC 2005: 369-372 - [c11]David Halupka, Alireza Seyed Rabi, Parham Aarabi, Ali Sheikholeslami:
Real-time dual-microphone speech enhancement using field programmable gate arrays. ICASSP (5) 2005: 149-152 - 2004
- [j9]Kostas Pagiamtzis, Ali Sheikholeslami:
A low-power content-addressable memory (CAM) using pipelined hierarchical search scheme. IEEE J. Solid State Circuits 39(9): 1512-1519 (2004) - [j8]Yadollah Eslami, Ali Sheikholeslami, Shoichi Masui, Toru Endo, Shoichiro Kawashima:
Circuit implementations of the differential capacitance read scheme (DCRS) for ferroelectric random-access memories (FeRAM). IEEE J. Solid State Circuits 39(11): 2024-2031 (2004) - [c10]Hiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu:
A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices. ISMVL 2004: 340-345 - [c9]Marcus van Ierssel, Joyce Wong, Ali Sheikholeslami:
An adaptive 4-PAM decision-feedback equalizer for chip-to-chip signaling. SoCC 2004: 297-300 - 2003
- [j7]Igor Arsovski, Trevis Chandler, Ali Sheikholeslami:
A ternary content-addressable memory (TCAM) based on 4T static storage and including a current-race sensing scheme. IEEE J. Solid State Circuits 38(1): 155-158 (2003) - [j6]Joseph Wai Kit Siu, Yadollah Eslami, Ali Sheikholeslami, P. Glenn Gulak, Toru Endo, Shoichiro Kawashima:
A current-based reference-generation scheme for 1T-1C ferroelectric random-access memories. IEEE J. Solid State Circuits 38(3): 541-549 (2003) - [j5]Simon Segars, Ali Sheikholeslami, Stephen Fischer:
Guest editorial [Special issue of the digital, memory, and signal processing sessions of the 2003 ISSCC]. IEEE J. Solid State Circuits 38(11): 1791-1794 (2003) - [j4]Igor Arsovski, Ali Sheikholeslami:
A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories. IEEE J. Solid State Circuits 38(11): 1958-1966 (2003) - [j3]Ali Sheikholeslami, D. Michael Miller:
Introduction: Special Issue in Recognition of Kenneth C. Smith. J. Multiple Valued Log. Soft Comput. 9(1): 1-3 (2003) - [j2]Nebu John Mathai, Deepa Kundur, Ali Sheikholeslami:
Hardware implementation perspectives of digital video watermarking algorithms. IEEE Trans. Signal Process. 51(4): 925-938 (2003) - [c8]Kostas Pagiamtzis, Ali Sheikholeslami:
Pipelined match-lines and hierarchical search-lines for low-power content-addressable memories. CICC 2003: 383-386 - [c7]Duy Cuong Nguyen, Parham Aarabi, Ali Sheikholeslami:
Real-time sound localization using field-programmable gate arrays. ICASSP (2) 2003: 573-576 - [c6]Duy Cuong Nguyen, Parham Aarabi, Ali Sheikholeslami:
Real-time sound localization using field-programmable gate arrays. ICME 2003: 829-832 - [c5]Marcus van Ierssel, Tooraj Esmailian, Ali Sheikholeslami, P. S. Pasupathy:
Signaling capacity of FR4 PCB traces for chip-to-chip communication. ISCAS (5) 2003: 85-88 - [c4]Nebu John Muthui, Ali Sheikholeslami, Deepa Kundur:
VLSI implementation of a real-time video watermark embedder and detector. ISCAS (2) 2003: 772-775 - 2002
- [c3]Joseph Wai Kit Siu, Yadollah Eslami, Ali Sheikholeslami, P. Glenn Gulak, Toru Endo, Shoichiro Kawashima:
A 16 kb 1T1C FeRAM test chip using current-based reference scheme. CICC 2002: 107-110 - 2000
- [j1]Ali Sheikholeslami, P. Glenn Gulak:
A survey of circuit innovations in ferroelectric random-access memories. Proc. IEEE 88(5): 667-689 (2000)
1990 – 1999
- 1998
- [c2]Ali Sheikholeslami, R. Yoshimura, P. Glenn Gulak:
Look-up Tables (LUTs) for Multiple-Valued, Combinational Logic. ISMVL 1998: 264-269 - 1996
- [c1]Ali Sheikholeslami, P. Glenn Gulak, Takahiro Hanyu:
A Multiple-Valued Ferroelectric Content-Addressable Memory. ISMVL 1996: 74-79
Coauthor Index
![](https://dblp.org/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-07-20 20:29 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint