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ORCIDAkira Kotabe
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Journal Articles
- 2012
[j8]Akira Kotabe, Kiyoo Itoh, Riichiro Takemura:
0.5-V 25-nm 6-T Cell with Boosted Word Voltage for 1-Gb SRAMs. IEICE Trans. Electron. 95-C(4): 555-563 (2012)- [j7]Akira Kotabe, Riichiro Takemura, Yoshimitsu Yanagawa, Tomonori Sekiguchi, Kiyoo Itoh:
Small-Sized Leakage-Controlled Gated Sense Amplifier for 0.5-V Multi-Gigabit DRAM Arrays. IEICE Trans. Electron. 95-C(4): 594-599 (2012) - [j6]Satoru Akiyama, Riichiro Takemura, Tomonori Sekiguchi, Akira Kotabe, Kiyoo Itoh:
A Low-Vt Small-Offset Gated-Preamplifier for Sub-1-V DRAM Mid-Point Sensing. IEICE Trans. Electron. 95-C(4): 600-608 (2012) - [j5]Kazuo Ono, Yoshimitsu Yanagawa, Akira Kotabe, Riichiro Takemura, Tatsuo Nakagawa, Tomio Iwasaki, Takayuki Kawahara
:
Fluctuation Tolerant Charge-Integration Read Scheme for Ultrafast DNA Sequencing with Nanopore Device. IEICE Trans. Electron. 95-C(4): 651-660 (2012) - 2011
- [j4]Tomonori Sekiguchi, Kazuo Ono, Akira Kotabe, Yoshimitsu Yanagawa:
1-Tbyte/s 1-Gbit DRAM Architecture Using 3-D Interconnect for High-Throughput Computing. IEEE J. Solid State Circuits 46(4): 828-837 (2011) - 2010
- [j3]Akira Kotabe, Yoshimitsu Yanagawa, Satoru Akiyama, Tomonori Sekiguchi:
0.5-V Low- V T CMOS Preamplifier for Low-Power and High-Speed Gigabit-DRAM Arrays. IEEE J. Solid State Circuits 45(11): 2348-2355 (2010) - 2007
- [j2]Hideaki Kurata, Kazuo Otsuga, Akira Kotabe, Shinya Kajiyama, Taro Osabe, Yoshitaka Sasago, Shunichi Narumi, Kenji Tokami, Shiro Kamohara, Osamu Tsuchiya:
Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node. IEEE J. Solid State Circuits 42(6): 1362-1369 (2007) - 2005
- [j1]Akira Kotabe, Kenichi Osada, Naoki Kitai, Mio Fujioka, Shiro Kamohara, Masahiro Moniwa, Sadayuki Morita, Yoshikazu Saitoh:
A low-power four-transistor SRAM cell with a stacked vertical poly-silicon PMOS and a dual-word-voltage scheme. IEEE J. Solid State Circuits 40(4): 870-876 (2005)
Conference and Workshop Papers
- 2012
- [c5]Yoshimitsu Yanagawa, Kazuo Ono, Akira Kotabe, Riichiro Takemura, Tatsuo Nakagawa, Tomio Iwasaki, Takayuki Kawahara:
Fluctuation tolerant read scheme for ultrafast DNA sequencing with nanopore device. ISCAS 2012: 2299-2302 - 2011
- [c4]Akira Kotabe, Kiyoo Itoh, Riichiro Takemura, Ryuta Tsuchiya, Masashi Horiguchi:
Device-conscious circuit designs for 0.5-V high-speed memory-rich nanoscale CMOS LSIs. CICC 2011: 1-7 - 2009
- [c3]Satoru Akiyama, Tomonori Sekiguchi, Riichiro Takemura, Akira Kotabe, Kiyoo Itoh:
Low-Vt small-offset gated preamplifier for sub-1V gigabit DRAM arrays. ISSCC 2009: 142-143 - 2007
- [c2]Satoru Hanzawa, Naoki Kitai, Kenichi Osada, Akira Kotabe, Yuichi Matsui, Nozomu Matsuzaki, Norikatsu Takaura, Masahiro Moniwa, Takayuki Kawahara:
A 512kB Embedded Phase Change Memory with 416kB/s Write Throughput at 100μA Cell Write Current. ISSCC 2007: 474-616 - 2001
- [c1]Tadayoshi Enomoto, Akira Kotabe:
A fast motion estimation algorithm and low-power 0.13-um CMOS motion estimation circuits. ISCAS (2) 2001: 449-452
Coauthor Index
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