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Conference and Workshop Papers
- 2022
[c8]Paul Devoge, Hassen Aziza, Philippe Lorenzini, Pascal Masson, Alexandre Malherbe, Franck Julien, Abderrezak Marzaki, Arnaud Régnier, Stephan Niel:
A Schmitt trigger to benchmark the performance of a new zero-cost transistor. ICECS 2022 2022: 1-4- [c7]Paul Devoge, Hassen Aziza, Philippe Lorenzini, Alexandre Malherbe, Franck Julien, Abderrezak Marzaki, Arnaud Régnier, Stephan Niel:
Digital-to-analog converters to benchmark the matching performance of a new zero-cost transistor. ISCAS 2022: 761-764 - 2021
- [c6]Paul Devoge
, Hassen Aziza, Philippe Lorenzini, Franck Julien, Abderrezak Marzaki, Alexandre Malherbe, Marc Mantelli, Thomas Sardin, Sébastien Haendler, Arnaud Régnier, Stephan Niel:
Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology. DTIS 2021: 1-5 - [c5]Romeric Gay, Vincenzo Della Marca, Hassen Aziza, Arnaud Régnier, Stephan Niel, Abderrezak Marzaki:
Benchmarking and optimization of trench-based multi-gate transistors in a 40 nm non-volatile memory technology. DTIS 2021: 1-4 - 2013
- [c4]Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour:
DCG-FGT transistor: Retention study of Floating Gate charge. MWSCAS 2013: 825-827 - 2012
- [c3]Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour:
PSP based DCG-FGT transistor Model: Full characterization procedure. ISCIT 2012: 222-227 - [c2]Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour:
A new adustable Schmitt Trigger based on Dual Control Gate-Floating Gate Transistor (DCG-FGT). MWSCAS 2012: 643-645 - 2011
- [c1]Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour:
PSP based DCG-FGT transistor model including characterization procedure. ICECS 2011: 228-231
Coauthor Index
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