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P. Andrew Scott

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affiliation: Cadence Design Systems
affiliation: Queen's University, Kingston, Ontario, Canada

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1990 – 1999

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1997
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Keith M. Carrig, Albert M. Chu, Frank D. Ferraiolo, John G. Petrovick, P. Andrew Scott, Richard J. Weiss:
A Clock Methodology for High-Performance Microprocessors. J. VLSI Signal Process. 16(2-3): 217-224 (1997)
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A. Bertolet, K. Carpenter, Keith M. Carrig, Albert M. Chu, A. Dean, Frank D. Ferraiolo, Stephan Kenyon, D. Phan, John G. Petrovick, G. Rodgers, D. Willmott, T. Bairley, T. Decker, V. Girardi, Y. Lapid, M. Murphy, P. Andrew Scott, Richard J. Weiss:
A pseudo-hierarchical methodology for high performance microprocessor design. ISPD 1997: 124-129

1980 – 1989

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1988
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P. Andrew Scott, Stanley J. Simmons, Stafford E. Tavares, Lloyd E. Peppard:
Architectures for exponentiation in GF(2^m). IEEE J. Sel. Areas Commun. 6(3): 578-585 (1988)
1986
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P. Andrew Scott, Stafford E. Tavares, Lloyd E. Peppard:
A Fast VLSI Multiplier for GF(2^m). IEEE J. Sel. Areas Commun. 4(1): 62-66 (1986)
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Glenn A. Orton, M. P. Roy, P. Andrew Scott, Lloyd E. Peppard, Stafford E. Tavares:
VLSI Implementation of Public-Key Encryption Algorithms. CRYPTO 1986: 277-301

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