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Altan Odabasioglu

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Journal Articles

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2002
[j2]
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Padmini Gopalakrishnan, Altan Odabasioglu, Lawrence T. Pileggi, Salil Raje:
An analysis of the wire-load model uncertainty problem. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(1): 23-31 (2002)
1998
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Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi:
PRIMA: passive reduced-order interconnect macromodeling algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(8): 645-654 (1998)

Conference and Workshop Papers

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2001
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Padmini Gopalakrishnan, Altan Odabasioglu, Lawrence T. Pileggi, Salil Raje:
Overcoming wireload model uncertainty during physical design. ISPD 2001: 182-189
1999
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  - conf/glvlsi/AcarOCP99
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Emrah Acar, Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi:
S2P: A Stable 2-Pole RC Delay and Coupling Noise Metric. Great Lakes Symposium on VLSI 1999: 60-63
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Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi:
Practical considerations for passive reduction of RLC circuits. ICCAD 1999: 214-220
1997
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Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi:
PRIMA: passive reduced-order interconnect macromodeling algorithm. ICCAD 1997: 58-65

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