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Robert Rinker
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2010 – 2019
- 2017
- [j5]Xin Mou, Hasan M. Jamil
, Robert Rinker:
Implementing computational biology pipelines using VisFlow. Int. J. Data Min. Bioinform. 17(2): 115-131 (2017) - 2016
- [c12]Xin Mou, Hasan M. Jamil
, Robert Rinker:
Visual orchestration and autonomous execution of distributed and heterogeneous computational biology pipelines. BIBM 2016: 752-757 - 2015
- [c11]Hani Alturkostani, Anup Chitrakar, Robert Rinker, Axel W. Krings:
On the Design of Jamming-Aware Safety Applications in VANETs. CISR 2015: 7:1-7:8 - 2012
- [c10]Michael D. Wilder, Robert Rinker:
Improving Security Assurance of Embedded Systems through Systemic Dissolution of Architected Resources. HICSS 2012: 5384-5392 - 2011
- [c9]Michael D. Wilder, Robert Rinker:
Synthesizing Concurrent Synchronous Computing Machines from Interrupt-Driven Binaries. DSD 2011: 430-433
2000 – 2009
- 2009
- [c8]Axel W. Krings, Li Tan, Clinton Jeffery, Robert Rinker:
Resilient multi-core systems: a hierarchical formal model for N-variant executions. CSIIRW 2009: 23 - 2006
- [j4]Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker, Fadi J. Kurdahi
:
Compile-time area estimation for LUT-based FPGAs. ACM Trans. Design Autom. Electr. Syst. 11(1): 104-122 (2006) - 2003
- [j3]Walid A. Najjar
, A. P. Wim Böhm, Bruce A. Draper, Jeffrey Hammes, Robert Rinker, J. Ross Beveridge, Monica Chawathe, Charles Ross:
High-Level Language Abstraction for Reconfigurable Computing. Computer 36(8): 63-69 (2003) - 2002
- [j2]A. P. Wim Böhm, Jeffrey Hammes, Bruce A. Draper, Monica Chawathe, Charlie Ross, Robert Rinker, Walid A. Najjar
:
Mapping a Single Assignment Programming Language to Reconfigurable Systems. J. Supercomput. 21(2): 117-130 (2002) - [c7]Dhananjay Kulkarni, Walid A. Najjar
, Robert Rinker, Fadi J. Kurdahi
:
Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems. FCCM 2002: 239- - 2001
- [j1]Robert Rinker, M. Carter, A. Patel, Monica Chawathe, Charlie Ross, Jeffrey Hammes, Walid A. Najjar
, A. P. Wim Böhm:
An automated process for compiling dataflow graphs into reconfigurable hardware. IEEE Trans. Very Large Scale Integr. Syst. 9(1): 130-139 (2001) - [c6]A. P. Wim Böhm, Bruce A. Draper, Walid A. Najjar, Jeffrey Hammes, Robert Rinker, Monica Chawathe, Charlie Ross:
One-Step Compilation of Image Processing Applications to FPGAs. FCCM 2001: 209-218 - [c5]Jeffrey Hammes, A. P. Wim Böhm, Charlie Ross, Monica Chawathe, Bruce A. Draper, Robert Rinker, Walid A. Najjar
:
Loop fusion and temporal common subexpression elimination in window-based loops. IPDPS 2001: 142 - 2000
- [c4]Robert Rinker, Jeffrey Hammes, Walid A. Najjar, A. P. Wim Böhm, Bruce A. Draper:
Compiling Image Processing Applications to Reconfigurable Hardware. ASAP 2000: 56-65 - [c3]Bruce A. Draper, Walid A. Najjar, A. P. Wim Böhm, Jeffrey Hammes, Robert Rinker, Charlie Ross, Monica Chawathe, José Bins:
Compiling and Optimizing Image Processing Algorithms for FPGAs. CAMP 2000: 222-231 - [c2]Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm, Walid A. Najjar, Bruce A. Draper:
A High Level, Algorithmic Programming Language and Compiler for Reconfigurable Systems. PDPTA 2000
1990 – 1999
- 1999
- [c1]Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm, Walid A. Najjar, Bruce A. Draper, J. Ross Beveridge:
Cameron: High level Language Compilation for Reconfigurable Systems. IEEE PACT 1999: 236-244
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