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Narayan R. Aluru
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2010 – 2019
- 2013
- [j6]Aravind Alwan, Narayan R. Aluru
:
Improved statistical models for limited datasets in uncertainty quantification using stochastic collocation. J. Comput. Phys. 255: 521-539 (2013)
2000 – 2009
- 2009
- [j5]Nitin Agarwal, Narayan R. Aluru
:
A domain adaptive stochastic collocation approach for analysis of MEMS under uncertainties. J. Comput. Phys. 228(20): 7662-7688 (2009) - 2007
- [j4]Nitin Agarwal, Narayan R. Aluru
:
A stochastic Lagrangian approach for geometrical uncertainties in electrostatics. J. Comput. Phys. 226(1): 156-179 (2007) - 2006
- [j3]Xin Wang, Joe Kanapka, Wenjing Ye
, Narayan R. Aluru
, Jacob White:
Algorithms in FastStokes and Its Application to Micromachined Device Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(2): 248-257 (2006) - 2004
- [c7]Gang Li, Narayan R. Aluru:
Hybrid techniques for electrostatic analysis of nanowires. ICCAD 2004: 241-244 - 2003
- [j2]Gang Li, Narayan R. Aluru
:
Efficient mixed-domain analysis of electrostatic MEMS. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(9): 1228-1242 (2003) - [c6]S. K. De, Narayan R. Aluru:
Physical And Reduced-Order Dynamic Analysis of MEMS. ICCAD 2003: 270-274 - 2002
- [c5]Gang Li, Narayan R. Aluru:
Efficient mixed-domain analysis of electrostatic MEMS. ICCAD 2002: 474-477 - 2000
- [c4]Rui Qiao
, Narayan R. Aluru:
Mixed-Domain and Reduced-Order Modeling of Electroosmotic Transport in Bio-MEMS. BMAS 2000: 51-56
1990 – 1999
- 1997
- [c3]Narayan R. Aluru, James White:
Algorithms for Coupled Domain MEMS Simulation. DAC 1997: 686-690 - 1996
- [j1]Narayan R. Aluru
, Kincho H. Law, Robert W. Dutton:
Simulation of the hydrodynamic device model on distributed memory parallel computers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(9): 1029-1047 (1996) - [c2]Narayan R. Aluru, V. B. Nadkarni, James White:
A Parallel Precorrected FFT Based Capacitance Extraction Program for Signal Integrity Analysis. DAC 1996: 363-366 - 1995
- [c1]Bruce P. Herndon, Narayan R. Aluru, Arthur Raefsky, Ronald J. G. Goossens, Kincho H. Law, Robert W. Dutton:
A Methodology for Parallelizing PDE Solvers: Application to Semiconductor Device Simulation. PP 1995: 239-240
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