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J. Gerardo García-Sánchez
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2010 – 2019
- 2014
- [j2]J. Gerardo García-Sánchez, José M. de la Rosa:
Efficient hybrid continuous-time/discrete-time cascade ΣΔ modulators for wideband applications. Microelectron. J. 45(10): 1234-1246 (2014) - 2012
- [j1]J. Gerardo García-Sánchez, José M. de la Rosa:
Multirate Downsampling Hybrid CT/DT Cascade Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(2): 285-294 (2012) - [c6]J. Gerardo García-Sánchez, José M. de la Rosa:
Efficient Hybrid Continuous-Time/Discrete-Time ∑ Δ Modulators for Broadband Wireless Telecom Systems. DoCEIS 2012: 485-492 - [c5]Alonso Morgado
, J. Gerardo García-Sánchez, Sohail Asghar, Luis Guerrero, Rocío del Río
, José M. de la Rosa:
A power-scalable concurrent cascade 2-2-2 SC ΣΔ modulator for Software Defined Radio. ISCAS 2012: 516-519 - [c4]J. Gerardo García-Sánchez, José M. de la Rosa
:
Hybrid continuous-time/discrete-time circuit techniques for the efficient implementation of wideband ΣΔ ADCs. MWSCAS 2012: 374-377 - 2011
- [c3]J. Gerardo García-Sánchez, José M. de la Rosa:
Efficient Multi-rate Hybrid Continuous-Time/Discrete-Time Cascade 2-2 Sigma-Delta Modulators for Wideband Telecom. VLSI-SoC (Selected Papers) 2011: 124-143 - [c2]J. Gerardo García-Sánchez, José M. de la Rosa:
Multirate hybrid continuous-time/discrete-time cascade 2-2 ΣΔ modulator for wideband telecom. VLSI-SoC 2011: 314-318 - 2010
- [c1]J. Gerardo García-Sánchez, José M. de la Rosa:
Multirate hybrid CT/DT cascade ΣΔ modulators with decreasing OSR of back-end DT stages. ISCAS 2010: 33-36
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