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Neha V. Karanjkar
Person information
- affiliation: Indian Institute of Technology Goa, India
- affiliation (former): Indian Institute of Science Bangalore, Robert Bosch Centre for Cyber-Physical Systems, India
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2020 – today
- 2023
- [c7]Lekshmi P., Tushar Lone, Neha V. Karanjkar:
DataFITR: An Open, Guided Input Modeling Tool for Creating Simulation-Based Digital Twins. SIMULTECH 2023: 279-286 - [c6]Tushar Lone, Lekshmi P., Neha V. Karanjkar:
An Open Tool-Set for Simulation, Design-Space Exploration and Optimization of Supply Chains and Inventory Problems. SIMULTECH 2023: 432-439 - 2022
- [c5]Neha V. Karanjkar, Madhav P. Desai:
Sitar: A Cycle-based Discrete-Event Simulation Framework for Architecture Exploration. SIMULTECH 2022: 142-150 - [i3]Neha V. Karanjkar, Subodh M. Joshi:
A Python-based Mixed Discrete-Continuous Simulation Framework for Digital Twins. CoRR abs/2208.01408 (2022) - 2021
- [c4]Neha V. Karanjkar, Subodh M. Joshi:
Mixed Discrete-Continuous Simulation for Digital Twins. SIMULTECH 2021: 422-429
2010 – 2019
- 2019
- [c3]Neha V. Karanjkar, Poorna Chandra Tejasvi
, Bharadwaj Amrutur:
A simpy-based simulation testbed for smart-city IoT applications: poster abstract. IoTDI 2019: 273-274 - 2018
- [c2]Neha V. Karanjkar, Ashish Joglekar, Sampad B. Mohanty, Venkatesh Prabhu, D. Raghunath, Rajesh Sundaresan:
Digital Twin for Energy Optimization in an SMT-PCB Assembly Line. IOTAIS 2018: 85-89 - 2016
- [i2]Neha V. Karanjkar, Madhav P. Desai:
On Continuous-space Embedding of Discrete-parameter Queuing Systems. CoRR abs/1606.02900 (2016) - 2015
- [c1]Neha V. Karanjkar, Madhav P. Desai:
An Approach to Discrete Parameter Design Space Exploration of Multi-core Systems Using a Novel Simulation Based Interpolation Technique. MASCOTS 2015: 85-88 - 2014
- [i1]Neha V. Karanjkar, Madhav P. Desai:
Optimization of Discrete-parameter Multiprocessor Systems using a Novel Ergodic Interpolation Technique. CoRR abs/1411.2222 (2014) - 2010
- [j1]Neha V. Karanjkar, Rasmi R. Sahoo, Maryam Shojaei Baghini:
Comments on "Improved Accuracy Pseudo-Exponential Function Generator With Applications in Analog Signal Processing". IEEE Trans. Very Large Scale Integr. Syst. 18(9): 1381-1383 (2010)
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