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Chencheng Ye 0001
Person information
- affiliation: Huazhong University of Science and Technology, School of Computer Science and Technology, Wuhan, China
- affiliation: University of Rochester, School of Computer Science, NY, USA
Other persons with the same name
- Chencheng Ye 0002
— Shanghai Jiao Tong University, School of Electronic Information and Electrical Engineering, China
- Chencheng Ye 0003 (aka: Chen-Cheng Ye 0003) — Kingdee International Software Group Company Limited, Kingdee Research, China (and 1 more)
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2020 – today
- 2025
- [j10]Yingshuai Dong, Chencheng Ye, Haikun Liu, Liting Tang, Xiaofei Liao, Hai Jin, Cheng Chen, Yanjiang Li, Yi Wang:
DTAP: Accelerating Strongly-Typed Programs with Data Type-Aware Hardware Prefetching. ACM Trans. Archit. Code Optim. 22(1): 25:1-25:25 (2025) - [c22]Jiaqi Zhai, Xuanhua Shi, Kaiyi Huang, Chencheng Ye, Weifang Hu, Bingsheng He, Hai Jin:
AccelES: Accelerating Top-K SpMV for Embedding Similarity via Low-bit Pruning. HPCA 2025: 977-990 - 2024
- [j9]Haikun Liu
, Xiaozhong Jin
, Chencheng Ye
, Xiaofei Liao
, Hai Jin
, Yu Zhang
:
I/O Causality Based In-Line Data Deduplication for Non-Volatile Memory Enabled Storage Systems. IEEE Trans. Computers 73(5): 1327-1340 (2024) - [c21]Yuanchao Xu
, James Pangia, Chencheng Ye, Yan Solihin, Xipeng Shen
:
Data Enclave: A Data-Centric Trusted Execution Environment. HPCA 2024: 218-232 - 2023
- [j8]Hao Ming, Tingting Pan, Dong Chen, Chencheng Ye
, Haikun Liu, Liting Tang, Xiaofei Liao, Hai Jin:
VIDGCN: Embracing input data diversity with a configurable graph convolutional network accelerator. J. Syst. Archit. 141: 102924 (2023) - [j7]Hai Jin
, Bo Lei
, Haikun Liu
, Xiaofei Liao
, Zhuohui Duan
, Chencheng Ye
, Yu Zhang
:
A Compilation Tool for Computation Offloading in ReRAM-based CIM Architectures. ACM Trans. Archit. Code Optim. 20(4): 47:1-47:25 (2023) - [j6]Hai Jin
, Shuo Wei
, Yan Sha, Chencheng Ye
, Haikun Liu
, Xiaofei Liao
:
PMLiteDB: Streamlining Access Paths for High-Performance Persistent Memory Document Database Systems. IEEE Trans. Computers 72(6): 1778-1791 (2023) - [j5]Xiaozhong Jin
, Haikun Liu
, Chencheng Ye
, Xiaofei Liao
, Hai Jin
, Yu Zhang
:
Accelerating Content-Defined Chunking for Data Deduplication Based on Speculative Jump. IEEE Trans. Parallel Distributed Syst. 34(9): 2568-2579 (2023) - [c20]Chencheng Ye, Yuanchao Xu, Xipeng Shen
, Yan Sha, Xiaofei Liao, Hai Jin, Yan Solihin:
SpecPMT: Speculative Logging for Resolving Crash Consistency Overhead of Persistent Memory. ASPLOS (2) 2023: 762-777 - [c19]Chencheng Ye, Yuanchao Xu, Xipeng Shen
, Yan Sha, Xiaofei Liao, Hai Jin, Yan Solihin:
Reconciling Selective Logging and Hardware Persistent Memory Transaction. HPCA 2023: 664-676 - [c18]Haodi Lu, Haikun Liu, Chencheng Ye, Xiaofei Liao, Fubing Mao, Yu Zhang, Hai Jin:
Software-Defined, Fast and Strongly-Consistent Data Replication for RDMA-Based PM Datastores. IPDPS 2023: 90-101 - 2022
- [j4]Chencheng Ye
, Yuanchao Xu, Xipeng Shen
, Hai Jin, Xiaofei Liao, Yan Solihin:
Preserving Addressability Upon GC-Triggered Data Movements on Non-Volatile Memory. ACM Trans. Archit. Code Optim. 19(2): 28:1-28:26 (2022) - [c17]Yuanchao Xu
, Chencheng Ye, Xipeng Shen
, Yan Solihin:
Temporal Exposure Reduction Protection for Persistent Memory. HPCA 2022: 908-924 - [c16]Mingzhe Liu, Haikun Liu, Chencheng Ye, Xiaofei Liao, Hai Jin, Yu Zhang, Ran Zheng, Liting Hu:
Towards low-latency I/O services for mixed workloads using ultra-low latency SSDs. ICS 2022: 13:1-13:12 - [c15]Yuanchao Xu
, Chencheng Ye, Yan Solihin, Xipeng Shen
:
FFCCD: fence-free crash-consistent concurrent defragmentation for persistent memory. ISCA 2022: 274-288 - 2021
- [c14]Chencheng Ye, Yuanchao Xu
, Xipeng Shen
, Xiaofei Liao, Hai Jin, Yan Solihin:
Hardware-Based Address-Centric Acceleration of Key-Value Store. HPCA 2021: 736-748 - [c13]Chencheng Ye, Yuanchao Xu
, Xipeng Shen
, Xiaofei Liao, Hai Jin, Yan Solihin:
Supporting Legacy Libraries on Non-Volatile Memory: A User-Transparent Approach. ISCA 2021: 443-455 - 2020
- [c12]Yuanchao Xu
, Chencheng Ye, Yan Solihin, Xipeng Shen
:
Hardware-Based Domain Virtualization for Intra-Process Isolation of Persistent Memory Objects. ISCA 2020: 680-692
2010 – 2019
- 2019
- [c11]Yaocheng Xiang
, Chencheng Ye, Xiaolin Wang, Yingwei Luo, Zhenlin Wang:
EMBA: Efficient Memory Bandwidth Allocation to Improve Performance on Intel Commodity Processor. ICPP 2019: 16:1-16:12 - 2018
- [j3]Xiameng Hu, Xiaolin Wang, Lan Zhou, Yingwei Luo, Zhenlin Wang, Chen Ding
, Chencheng Ye:
Fast Miss Ratio Curve Modeling for Storage Cache. ACM Trans. Storage 14(2): 12:1-12:34 (2018) - [c10]Zhizhou Zhang
, Chencheng Ye, Rahman Lavaee, Ning Gu, Chen Ding
:
Fine-grained data usage analysis by access sampling: seeing the data that is not there. MEMSYS 2018: 221-231 - 2017
- [j2]Chencheng Ye, Jacob Brock, Chen Ding
, Hai Jin:
Rochester Elastic Cache Utility (RECU): Unequal Cache Sharing is Good Economics. Int. J. Parallel Program. 45(1): 30-44 (2017) - [j1]Chencheng Ye, Chen Ding
, Hao Luo, Jacob Brock, Dong Chen, Hai Jin:
Cache Exclusivity and Sharing: Theory and Optimization. ACM Trans. Archit. Code Optim. 14(4): 34:1-34:26 (2017) - [c9]Chencheng Ye, Chen Ding, Hai Jin:
Memory equalizer for lateral management of heterogeneous memory. MEMSYS 2017: 239-248 - 2016
- [c8]Hao Luo, Jacob Brock, Pengcheng Li, Chen Ding, Chencheng Ye:
Compositional model of coherence and NUMA effects for optimizing thread and data placement. ISPASS 2016: 151-152 - [c7]Dong Chen, Chencheng Ye, Chen Ding
:
Write Locality and Optimization for Persistent Memory. MEMSYS 2016: 77-87 - [c6]Jacob Brock, Chencheng Ye, Chen Ding
:
Replacement Policies for Heterogeneous Memories. MEMSYS 2016: 232-237 - 2015
- [c5]Jacob Brock, Chencheng Ye, Chen Ding, Yechen Li, Xiaolin Wang, Yingwei Luo:
Optimal Cache Partition-Sharing. ICPP 2015: 749-758 - [c4]Chen Ding
, Hao Lu, Chencheng Ye:
MMC: a Many-core Memory Connection Model. MEMSYS 2015: 47-50 - 2014
- [c3]Jianmin Bi, Xiaofei Liao, Yu Zhang, Chencheng Ye, Hai Jin, Laurence T. Yang:
An Adaptive Task Granularity Based Scheduling for Task-centric Parallelism. HPCC/CSS/ICESS 2014: 165-172 - [c2]Tian Xiao, Zhenyu Guo, Hucheng Zhou, Jiaxing Zhang, Xu Zhao, Chencheng Ye, Xi Wang, Wei Lin, Wenguang Chen, Lidong Zhou:
Cybertron: pushing the limit on I/O reduction in data-parallel programs. OOPSLA 2014: 895-908 - 2012
- [c1]Xuepeng Fan, Hai Jin, Liang Zhu, Xiaofei Liao, Chencheng Ye, Xuping Tu:
Function flow: making synchronization easier in task parallelism. PMAM 2012: 74-82
Coauthor Index

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last updated on 2025-05-18 20:24 CEST by the dblp team
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