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ORCIDYunjae Suh
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2020 – today
- 2020
[c7]Yunjae Suh, Seungnam Choi, Masamichi Ito, Jeongseok Kim, Youngho Lee, Jongseok Seo, Heejae Jung, Dong-Hee Yeo, Seol Namgung, Jongwoo Bong, Sehoon Yoo, Seung-Hun Shin, Doowon Kwon, Pilkyu Kang, Seokho Kim, Hoonjoo Na, Kihyun Hwang, Chang-Woo Shin, Jun-Seok Kim, Paul K. J. Park, Joonseok Kim, Hyunsurk Ryu, Yongin Park:
A 1280×960 Dynamic Vision Sensor with a 4.95-μm Pixel Pitch and Motion Artifact Minimization. ISCAS 2020: 1-5
2010 – 2019
- 2017
- [j8]Seungnam Choi, Yunjae Suh, Joohyun Lee, Jinkyu Kim, Byungsub Kim
, Hong-June Park, Jae-Yoon Sim:
A Self-Biased Current-Mode Amplifier With an Application to 10-bit Pipeline ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(7): 1706-1717 (2017) - [c6]Bongki Son, Yunjae Suh, Sungho Kim, Heejae Jung, Jun-Seok Kim, Chang-Woo Shin, Keunju Park, Kyoobin Lee, Jin Man Park, Jooyeon Woo, Yohan Roh, Hyunku Lee, Yibing Michelle Wang, Ilia A. Ovsiannikov, Hyunsurk Ryu:
4.1 A 640×480 dynamic vision sensor with a 9µm pixel and 300Meps address-event representation. ISSCC 2017: 66-67 - 2016
- [j7]Dong-Woo Jee, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADC. J. Circuits Syst. Comput. 25(12): 1650155:1-1650155:16 (2016) - [j6]Yunjae Suh, Seungnam Choi, Jae-Yoon Sim:
A Low-Power Class-AB Gm-Based Amplifier With Application to an 11-bit Pipelined ADC. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2562-2569 (2016) - 2015
- [c5]Paul K. J. Park, Kyoobin Lee, Junhaeng Lee, Byungkon Kang, Chang-Woo Shin, Jooyeon Woo, Jun-Seok Kim, Yunjae Suh, Sungho Kim, Saber Moradi, Ogan Gurel, Hyunsurk Ryu:
Computationally efficient, real-time motion recognition based on bio-inspired visual and cognitive processing. ICIP 2015: 932-935 - 2014
- [c4]Yunjae Suh, Seungnam Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A voltage-scalable 10-b pipelined ADC with current-mode amplifier. CICC 2014: 1-4 - 2013
- [j5]Jun-Seok Kim, Young Hun Seo, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
A 300-MS/s, 1.76-ps-Resolution, 10-b Asynchronous Pipelined Time-to-Digital Converter With on-Chip Digital Background Calibration in 0.13-µm CMOS. IEEE J. Solid State Circuits 48(2): 516-526 (2013) - [j4]Dong-Woo Jee, Yunjae Suh, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL. IEEE J. Solid State Circuits 48(11): 2795-2804 (2013) - [j3]Yunjae Suh, Jongmi Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 60-II(3): 142-146 (2013) - 2012
- [c3]Hyunsoo Ha, Yunjae Suh, Seon-Kyoo Lee, Hong-June Park, Jae-Yoon Sim:
A 0.5V, 11.3-μW, 1-kS/s resistive sensor interface circuit with correlated double sampling. CICC 2012: 1-4 - 2011
- [c2]Dong-Woo Jee, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
A 0.1-fref BW 1GHz fractional-N PLL with FIR-embedded phase-interpolator-based noise filtering. ISSCC 2011: 94-96 - 2010
- [j2]Young-Sang Kim, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
An Analysis and Design Methodology of Resistor-Based Phase Error Averaging for Multiphase Generation. IEICE Trans. Electron. 93-C(12): 1662-1669 (2010) - [c1]Seon-Kyoo Lee, Young Hun Seo, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
A 1GHz ADPLL with a 1.25ps minimum-resolution sub-exponent TDC in 0.18µm CMOS. ISSCC 2010: 482-483
2000 – 2009
- 2008
- [j1]Young-Sang Kim, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
Deadzone-Minimized Systematic Offset-Free Phase Detectors. IEICE Trans. Electron. 91-C(9): 1525-1528 (2008)
Coauthor Index
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