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Margus Kruus
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2010 – 2019
- 2017
- [c14]Iouliia Skliarova
, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
:
Reconfigurable systems in engineering education: Best practices and future trends. EDUCON 2017: 1084-1088 - 2015
- [c13]Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, Margus Kruus
:
FPGA-based time and cost effective Hamming weight comparators for binary vectors. EUROCON 2015: 1-6 - [c12]Iouliia Skliarova, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
:
Integration of high-level synthesis to the courses on reconfigurable digital systems. MIPRO 2015: 166-171 - 2014
- [c11]Iouliia Skliarova
, Valery Sklyarov
, Alexander Sudnitson, Margus Kruus
:
Teaching FPGA-based systems. EDUCON 2014: 460-469 - [c10]Helena Kruus, Marina Brik, Margus Kruus
, Priit Ruberg
, Vladimir Viies, Peeter Ellervee
:
Hardware close programming for freshmen. EWME 2014: 93-96 - 2013
- [c9]Valery Sklyarov
, Iouliia Skliarova
, Margus Kruus
, Dmitri Mihhailov, Alexander Sudnitson:
Address-based data processing over N-ary trees. EUROCON 2013: 1790-1797 - 2011
- [c8]Dmitri Mihhailov, Margus Kruus
, Valery Sklyarov
, Iouliia Skliarova
, Alexander Sudnitson:
Recursion and hierarchy in digital design and prototyping: a case study. CompSysTech 2011: 45-50 - 2010
- [c7]Alexander Sudnitson, Dmitri Mihhailov, Margus Kruus
:
Advanced topics of FSM design using FPGA educational boards and web-based tools. EWDTS 2010: 514-517
2000 – 2009
- 2009
- [c6]Alexander Sudnitson, Dmitri Mihhailov, Margus Kruus
, Konstantin Tarletski:
FSM decomposition with application to FPGA synthesis. CompSysTech 2009: 74 - 2008
- [c5]Dmitri Mihhailov, Margus Kruus
, Alexander Sudnitson:
FPGA platform based digital design education. CompSysTech 2008: 53 - 2007
- [j2]Raimund Ubar, Artur Jutman, Margus Kruus, Elmet Orasson, Sergei Devadze, Heinz-Dietrich Wuttke:
Learning Digital Test and Diagnostics via Internet. Int. J. Online Eng. 3(1) (2007) - [c4]Jaan Raik
, Raimund Ubar
, Anna Krivenko, Margus Kruus
:
Hierarchical Identification of Untestable Faults in Sequential Circuits. DSD 2007: 668-671 - [c3]Gert Jervan
, Margus Kruus
, Ennu Rüstern:
Graduate School in Information and Communication Technologies. Experiences at Tallinn University of Technology. MSE 2007: 25-26 - 2003
- [c2]Elena Fomina, Andres Keevallik, Margus Kruus, Alexander Sudnitson:
A decomposition procedure for register-transfer level power management. CompSysTech 2003: 26-31 - 2002
- [c1]Tarmo Robal, Vladimir Viies, Margus Kruus:
The Rational Unified Process with the "4+1" View Model of Software Architecture - a Way for Modeling Web Applications. BalticDB&IS 2002: 119-132 - 2001
- [j1]Bengt Oelmann, Kalle Tammemäe, Margus Kruus
, Mattias O'Nils:
Automatic FSM Synthesis for Low-power Mixed Synchronous/Asynchronous Implementation. VLSI Design 12(2): 167-186 (2001)
Coauthor Index
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