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S. Y. A. Shah

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2000 – 2009

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2001
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R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah:
A Low Power Approach to Floating Point Adder Design for DSP Applications. J. VLSI Signal Process. 27(3): 195-213 (2001)
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R. V. K. Pillai, S. Y. A. Shah, A. J. Al-Khalili, Dhamin Al-Khalili:
Low power floating point MAFs-a comparative study. ISSPA 2001: 284-287

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