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Anindya Saha
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2020 – today
- 2024
- [c9]Makarand Kulkarni, Pramit Biswas, Parag Naik, Anindya Saha:
A Framework for Design of Portable and Scalable Physical Layer in O- RAN. COMSNETS 2024: 1112-1115 - 2023
- [j2]Seok-Ki Ahn, Sungjun Ahn, Jeongchang Kim, Hyeongseok Kim, Sunhyoung Kwon, Sungho Jeon, Mats Ek, Sesh Simha, Anindya Saha, Prashant M. Maru, Parag Naik, Mark Aitken, Pablo Angueira, Yiyan Wu, Sung-Ik Park:
Evaluation of ATSC 3.0 and 3GPP Rel-17 5G Broadcasting Systems for Mobile Handheld Applications. IEEE Trans. Broadcast. 69(2): 338-356 (2023) - [c8]Sungjun Ahn, Seok-Ki Ahn, Sung-Ik Park, Jeongchang Kim, Sungho Jeon, Mats Ek, Sesh Simha, Mark Aitken, Anindya Saha, Prashant M. Maru, Parag Naik, Joonhyuk Kang:
Adaptive Modification of Fading Channel Models for Terrestrial SFN Environments. BMSB 2023: 1-6 - [c7]Seok-Ki Ahn, Sungjun Ahn, Sesh Simha, Mark Aitken, Anindya Saha, Prashant M. Maru, Parag Naik, Sung-Ik Park:
Performance Evaluation of 5G MBS for Terrestrial Broadcasting Scenarios. BMSB 2023: 1-4 - 2022
- [c6]Rashmi Kamran, Pranav Jha, Shwetha Kiran, Abhay Karandikar, Prasanna Chaporkar, Anindya Saha, Arindam Chakraborty:
A Survey on Multicast Broadcast Services in 5G and Beyond. NCC 2022: 344-349 - 2020
- [c5]Anindya Saha, Makarand Kulkarni, Parag Naik, Arindam Chakraborty, Gururaj Padaki, Subrahmanya KS:
A Collaborative RAN Approach for Handling Multicast-Broadcast Traffic in 5GS. 5G World Forum 2020: 92-97
2010 – 2019
- 2018
- [c4]Anindya Saha, Saurabh Chaubey, Ramesh Harjani:
A 100MS/s 9-bit Companding SAR ADC with On-Chip Input Driver in 65nm CMOS for Multi-Carrier Communications. MWSCAS 2018: 174-177 - 2015
- [j1]Ramesh Harjani, Danijela Cabric, Dejan Markovic, Brian M. Sadler, Rakesh Kumar Palani, Anindya Saha, Hundo Shin, Eric Rebeiz, Sina Basir-Kazeruni, Fang-Li Yuan:
Wideband blind signal classification on a battery budget. IEEE Commun. Mag. 53(10): 173-181 (2015) - [c3]Hundo Shin, Rakesh Kumar Palani, Anindya Saha, Fang-Li Yuan, Dejan Markovic, Ramesh Harjani:
An eight channel analog-FFT based 450MS/s hybrid filter bank ADC with improved SNDR for multi-band signals in 40nm CMOS. CICC 2015: 1-4 - [c2]Fang-Li Yuan, Rakesh Kumar Palani, Sina Basir-Kazeruni, Hundo Shin, Anindya Saha, Ramesh Harjani, Dejan Markovic:
A throughput-agnostic 11.9-13.6GOPS/mW multi-signal classification SoC for cognitive radios in 40nm CMOS. VLSIC 2015: 150-
2000 – 2009
- 2005
- [c1]Atul Jain, Anindya Saha, Jagdish Rao:
SoC Design Methodology: A Practical Approach. VLSI Design 2005: 10-11
Coauthor Index
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