BibTeX record journals/tvlsi/LuTT12

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@article{DBLP:journals/tvlsi/LuTT12,
  author       = {Jianchao Lu and
                  Ying Teng and
                  Baris Taskin},
  title        = {A Reconfigurable Clock Polarity Assignment Flow for Clock Gated Designs},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {20},
  number       = {6},
  pages        = {1002--1011},
  year         = {2012},
  url          = {https://doi.org/10.1109/TVLSI.2011.2147339},
  doi          = {10.1109/TVLSI.2011.2147339},
  timestamp    = {Wed, 11 Mar 2020 18:17:10 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/LuTT12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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