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"Design of optimized reversible multiplier for high speed DSP application."

A. N. Nagamani et al. (2015)

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DOI: 10.1109/ICICS.2015.7459869

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  - conf/IEEEicics/NagamaniPHA15
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A. N. Nagamani, H. Vishnu Prasad, Rajendra S. Hathwar, Vinod Kumar Agrawal:
Design of optimized reversible multiplier for high speed DSP application. ICICS 2015: 1-5

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