"Logic Design Considerations for 0.5-Volt CMOS."

K. Joseph Hass, Jack Venbrux, Prakash Bhatia (2001)

Details and statistics

DOI: 10.1109/ARVLSI.2001.915552

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

a service of  Schloss Dagstuhl - Leibniz Center for Informatics