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"100MS/s 9-bit 0.43mW SAR ADC with custom capacitor array."

Jingjing Wang et al. (2015)

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DOI: 10.1109/ASICON.2015.7517107

access: closed

type: Conference or Workshop Paper

metadata version: 2020-07-06

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  dblp key:
  - conf/asicon/WangXC0XR15
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  - https://dblp.org/rec/conf/asicon/WangXC0XR15
Jingjing Wang, Rongjin Xu, Chixiao Chen, Fan Ye, Jun Xu, Junyan Ren:
100MS/s 9-bit 0.43mW SAR ADC with custom capacitor array. ASICON 2015: 1-4

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