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"Physical verification flow for hierarchical analog ic design constraints."

Volker Meyer zu Bexten et al. (2015)

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DOI: 10.1109/ASPDAC.2015.7059047

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Volker Meyer zu Bexten, Markus Tristl, Göran Jerke, Hartmut Marquardt, Dina Medhat:
Physical verification flow for hierarchical analog ic design constraints. ASP-DAC 2015: 447-453

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